Semiconductor Processing Methods, And Methods Of Forming Isolation Structures
    1.
    发明申请
    Semiconductor Processing Methods, And Methods Of Forming Isolation Structures 有权
    半导体加工方法和形成隔离结构的方法

    公开(公告)号:US20120329231A1

    公开(公告)日:2012-12-27

    申请号:US13603100

    申请日:2012-09-04

    IPC分类号: H01L21/762 H01L21/336

    摘要: Some embodiments include methods of forming isolation structures. A semiconductor base may be provided to have a crystalline semiconductor material projection between a pair of openings. SOD material (such as, for example, polysilazane) may be flowed within said openings to fill the openings. After the openings are filled with the SOD material, one or more dopant species may be implanted into the projection to amorphize the crystalline semiconductor material within an upper portion of said projection. The SOD material may then be annealed at a temperature of at least about 400° C. to form isolation structures. Some embodiments include semiconductor constructions that include a semiconductor material base having a projection between a pair of openings. The projection may have an upper region over a lower region, with the upper region being at least 75% amorphous, and with the lower region being entirely crystalline.

    摘要翻译: 一些实施方案包括形成隔离结构的方法。 可以提供半导体基底以在一对开口之间具有晶体半导体材料突起。 SOD材料(例如,聚硅氮烷)可以在所述开口内流动以填充开口。 在用SOD材料填充开口之后,可以将一种或多种掺杂剂物质注入到投影中,使晶体半导体材料在所述突起的上部非晶化。 然后可以在至少约400℃的温度下对SOD材料进行退火以形成隔离结构。 一些实施例包括半导体结构,其包括在一对开口之间具有突起的半导体材料基底。 突起可以在下部区域上方具有上部区域,其中上部区域为至少75%的无定形,并且下部区域是完全结晶的。

    Semiconductor processing methods, and methods of forming isolation structures
    2.
    发明授权
    Semiconductor processing methods, and methods of forming isolation structures 有权
    半导体加工方法和形成隔离结构的方法

    公开(公告)号:US08906771B2

    公开(公告)日:2014-12-09

    申请号:US13603100

    申请日:2012-09-04

    摘要: Some embodiments include methods of forming isolation structures. A semiconductor base may be provided to have a crystalline semiconductor material projection between a pair of openings. SOD material (such as, for example, polysilazane) may be flowed within said openings to fill the openings. After the openings are filled with the SOD material, one or more dopant species may be implanted into the projection to amorphize the crystalline semiconductor material within an upper portion of said projection. The SOD material may then be annealed at a temperature of at least about 400° C. to form isolation structures. Some embodiments include semiconductor constructions that include a semiconductor material base having a projection between a pair of openings. The projection may have an upper region over a lower region, with the upper region being at least 75% amorphous, and with the lower region being entirely crystalline.

    摘要翻译: 一些实施方案包括形成隔离结构的方法。 可以提供半导体基底以在一对开口之间具有晶体半导体材料突起。 SOD材料(例如,聚硅氮烷)可以在所述开口内流动以填充开口。 在用SOD材料填充开口之后,可以将一种或多种掺杂剂物质注入到投影中,使晶体半导体材料在所述突起的上部非晶化。 然后可以在至少约400℃的温度下对SOD材料进行退火以形成隔离结构。 一些实施例包括半导体结构,其包括在一对开口之间具有突起的半导体材料基底。 突起可以在下部区域上方具有上部区域,其中上部区域为至少75%的无定形,并且下部区域是完全结晶的。

    Semiconductor constructions
    3.
    发明授权
    Semiconductor constructions 失效
    半导体结构

    公开(公告)号:US08274081B2

    公开(公告)日:2012-09-25

    申请号:US12728942

    申请日:2010-03-22

    IPC分类号: H01L29/04 H01L33/16

    摘要: Some embodiments include methods of forming isolation structures. A semiconductor base may be provided to have a crystalline semiconductor material projection between a pair of openings. SOD material (such as, for example, polysilazane) may be flowed within said openings to fill the openings. After the openings are filled with the SOD material, one or more dopant species may be implanted into the projection to amorphize the crystalline semiconductor material within an upper portion of said projection. The SOD material may then be annealed at a temperature of at least about 400° C. to form isolation structures. Some embodiments include semiconductor constructions that include a semiconductor material base having a projection between a pair of openings. The projection may have an upper region over a lower region, with the upper region being at least 75% amorphous, and with the lower region being entirely crystalline.

    摘要翻译: 一些实施方案包括形成隔离结构的方法。 可以提供半导体基底以在一对开口之间具有晶体半导体材料突起。 SOD材料(例如,聚硅氮烷)可以在所述开口内流动以填充开口。 在用SOD材料填充开口之后,可以将一种或多种掺杂剂物质注入到投影中,使晶体半导体材料在所述突起的上部非晶化。 然后可以在至少约400℃的温度下对SOD材料进行退火以形成隔离结构。 一些实施例包括半导体结构,其包括在一对开口之间具有突起的半导体材料基底。 突起可以在下部区域上方具有上部区域,其中上部区域为至少75%的无定形,并且下部区域是完全结晶的。

    Semiconductor Constructions, Semiconductor Processing Methods, And Methods Of Forming Isolation Structures
    4.
    发明申请
    Semiconductor Constructions, Semiconductor Processing Methods, And Methods Of Forming Isolation Structures 失效
    半导体结构,半导体加工方法和形成隔离结构的方法

    公开(公告)号:US20110227071A1

    公开(公告)日:2011-09-22

    申请号:US12728942

    申请日:2010-03-22

    摘要: Some embodiments include methods of forming isolation structures. A semiconductor base may be provided to have a crystalline semiconductor material projection between a pair of openings. SOD material (such as, for example, polysilazane) may be flowed within said openings to fill the openings. After the openings are filled with the SOD material, one or more dopant species may be implanted into the projection to amorphize the crystalline semiconductor material within an upper portion of said projection. The SOD material may then be annealed at a temperature of at least about 400° C. to form isolation structures. Some embodiments include semiconductor constructions that include a semiconductor material base having a projection between a pair of openings. The projection may have an upper region over a lower region, with the upper region being at least 75% amorphous, and with the lower region being entirely crystalline.

    摘要翻译: 一些实施方案包括形成隔离结构的方法。 可以提供半导体基底以在一对开口之间具有晶体半导体材料突起。 SOD材料(例如,聚硅氮烷)可以在所述开口内流动以填充开口。 在用SOD材料填充开口之后,可以将一种或多种掺杂剂物质注入到投影中,使晶体半导体材料在所述突起的上部非晶化。 然后可以在至少约400℃的温度下对SOD材料进行退火以形成隔离结构。 一些实施例包括半导体结构,其包括在一对开口之间具有突起的半导体材料基底。 突起可以在下部区域上方具有上部区域,其中上部区域为至少75%的无定形,并且下部区域是完全结晶的。