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公开(公告)号:US11784155B2
公开(公告)日:2023-10-10
申请号:US17702868
申请日:2022-03-24
Applicant: WOLFSPEED, INC.
Inventor: Sung Chul Joo , Jack Powell , Donald Farrell , Bradley Millon
CPC classification number: H01L24/37 , H01L23/562 , H01L23/66 , H01L24/35 , H01L24/40 , H01L24/84 , H01P3/003 , H01P11/003 , H01L2223/6627 , H01L2224/37012 , H01L2224/40157 , H01L2924/19033 , H01L2924/35121
Abstract: A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.
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公开(公告)号:US20230019230A1
公开(公告)日:2023-01-19
申请号:US17935509
申请日:2022-09-26
Applicant: Wolfspeed, Inc.
Inventor: Sung Chul Joo , Alexander Komposch , Brian William Condie , Benjamin Law , Jae Hyung Jeremiah Park
IPC: H01L23/00
Abstract: A semiconductor device package includes a substrate, a silicon (Si) or silicon carbide (SiC) semiconductor die, and a metal layer on a surface of the semiconductor die. The metal layer includes a bonding surface that is attached to a surface of the substrate by a die attach material. The bonding surface includes opposing edges that extend along a perimeter of the semiconductor die, and one or more non-orthogonal corners that are configured to reduce stress at an interface between the bonding surface and the die attach material. Related devices and fabrication methods are also discussed.
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