公开(公告)号：US12009565B2

公开(公告)日：2024-06-11

申请号：US17314219

申请日：2021-05-07

Applicant: NXP B.V.

Inventor： Olivier Tesson ,  Mustafa Acar

IPC: H03H7/46 ,  H01L23/66 ,  H01P5/16 ,  H01P11/00

CPC classification number: H01P5/16 ,  H01L23/66 ,  H01P11/003 ,  H03H7/461 ,  H01L2223/6627

Abstract: A power combiner/splitter for multiple input multiple output (MIMO) applications and a method of making the same. A metallisation stack has a plurality of layers including patterned metal features forming first and second branched arrangements of the power combiner/splitter. Each branched arrangement includes a port located at one end of that branched arrangement, and a plurality of further ports. Each branched arrangement also includes a plurality of bifurcated branches extending between each end of that branched arrangement for dividing/combining a signal passing through that branched arrangement between the port and the plurality of further ports. The metallisation stack further includes a common ground plane that is shared by the first and second branched arrangements. At least some of the patterned metal features forming the first branched arrangement overlie at least some of the patterned metal features forming the second branched arrangement.

公开(公告)号：US11881610B2

公开(公告)日：2024-01-23

申请号：US17154255

申请日：2021-01-21

Applicant: Raytheon Company

Inventor： Keely M. Musgrove ,  Mark B. Hanna

IPC: H01P1/387 ,  H01P1/38 ,  H01P1/36 ,  H01P11/00 ,  B41M1/12 ,  B32B7/12 ,  B32B37/12 ,  B32B38/00 ,  B32B15/04

CPC classification number: H01P1/38 ,  B32B7/12 ,  B32B15/04 ,  B32B37/12 ,  B32B38/145 ,  B41M1/12 ,  H01P1/36 ,  H01P1/387 ,  H01P11/00 ,  H01P11/003 ,  B32B2255/06 ,  B32B2307/20 ,  B32B2457/00

Abstract: A method of fabricating a portion of magnetically controlled signal distribution device includes receiving a substrate and screen printing a low-k dielectric spacer over an upper surface of the surface from a low-k dielectric paste. The method also includes firing the substrate after the spacer has been screen printed thereon, forming an adhesive layer on top of the spacer and securing a magnet to a top of the adhesive layer.

公开(公告)号：US20230345624A1

公开(公告)日：2023-10-26

申请号：US18217675

申请日：2023-07-03

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Nobuo IKEMOTO ,  Noriaki OKUDA ,  Kosuke NISHIO

IPC: H05K1/02 ,  H01P3/08 ,  H01P11/00 ,  H05K1/03 ,  H05K3/00

CPC classification number: H05K1/0243 ,  H01P3/08 ,  H01P11/003 ,  H05K1/03 ,  H05K3/0011 ,  H05K2201/10015 ,  H05K2201/10098

Abstract: A multilayer substrate includes a multilayer body including insulation layers stacked on top of one another in an up-and-down direction. The insulation layers include a porous insulation layer. The multilayer substrate includes a first region and a second region. A dimension of the porous insulation layer in the up-and-down direction is smaller in the first region than in the second region. An average void size of the porous insulation layer is smaller in the first region than in the second region, and/or the porous insulation layer is denser in the first region than in the second region.

公开(公告)号：US11784155B2

公开(公告)日：2023-10-10

申请号：US17702868

申请日：2022-03-24

Applicant: WOLFSPEED, INC.

Inventor： Sung Chul Joo ,  Jack Powell ,  Donald Farrell ,  Bradley Millon

IPC: H01L23/66 ,  H01L23/00 ,  H01P11/00 ,  H01P3/00

CPC classification number: H01L24/37 ,  H01L23/562 ,  H01L23/66 ,  H01L24/35 ,  H01L24/40 ,  H01L24/84 ,  H01P3/003 ,  H01P11/003 ,  H01L2223/6627 ,  H01L2224/37012 ,  H01L2224/40157 ,  H01L2924/19033 ,  H01L2924/35121

Abstract: A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.

公开(公告)号：US11721650B2

公开(公告)日：2023-08-08

申请号：US16437930

申请日：2019-06-11

Applicant: Intel Corporation

Inventor： Brandon C. Marin ,  Aleksandar Aleksov ,  Georgios Dogiamis ,  Jeremy D. Ecton ,  Suddhasattwa Nad ,  Mohammad Mamunur Rahman

IPC: H01L23/66 ,  H01L23/498 ,  H01L21/48 ,  H01P3/08 ,  H01P11/00 ,  H01P3/06

CPC classification number: H01L23/66 ,  H01L21/481 ,  H01L21/4846 ,  H01L23/49838 ,  H01P3/06 ,  H01P3/08 ,  H01P3/088 ,  H01P11/003 ,  H01P11/005 ,  H01L2223/6627

Abstract: Embodiments include semiconductor packages and method of forming the semiconductor packages. A semiconductor package includes first waveguides over a package substrate. The first waveguides include first angled conductive layers, first transmission lines, and first cavities. The semiconductor package also includes a first dielectric over the first waveguides and package substrate, second waveguides over the first dielectric and first waveguides, and a second dielectric over the second waveguides and first dielectric. The second waveguides include second angled conductive layers, second transmission lines, and second cavities. The first angled conductive layers are positioned over the first transmission lines and package substrate having a first pattern of first triangular structures. The second angled conductive layers are positioned over the second transmission lines and first dielectric having a second pattern of second triangular structures, where the second pattern is shaped as a coaxial interconnects enclosed with second triangular structures and portions of first dielectric.

公开(公告)号：US11652265B2

公开(公告)日：2023-05-16

申请号：US17190776

申请日：2021-03-03

Applicant: AVX Corporation

Inventor： Arie Leonid Talalaevsky ,  Michael Marek ,  Elinor O'Neill

IPC: H01P5/18 ,  H01P5/12 ,  H01P3/08 ,  H05K1/11 ,  H05K1/02 ,  H01P11/00 ,  H04W88/08

CPC classification number: H01P5/184 ,  H01P3/081 ,  H01P5/12 ,  H01P11/003 ,  H05K1/0237 ,  H05K1/115 ,  H04W88/08 ,  H05K2201/10098

Abstract: A high frequency coupler is disclosed that is configured for grid array-type surface mounting. The coupler includes a monolithic base substrate having a top surface and a bottom surface. A first thin film microstrip and a second thin film microstrip are each disposed on the top surface of the monolithic base substrate. Each microstrip has an input end and an output end. At least one via extends through the monolithic base substrate from the top surface to the bottom surface of the monolithic base substrate. The via(s) are electrically connected with at least one of the input end or the output end of the first microstrip or the second microstrip. The coupler has a coupling factor that is greater than about −30 dB at about 28 GHz.

公开(公告)号：US20190150271A1

公开(公告)日：2019-05-16

申请号：US16184571

申请日：2018-11-08

Applicant: RAYTHEON COMPANY

Inventor： Semira M. Azadzoi ,  James E. Benedict ,  John P. Haven ,  Thomas V. Sikina ,  Andrew R. Southworth

IPC: H05K1/02 ,  H01P3/08 ,  H01P11/00 ,  H05K1/11 ,  H05K3/00 ,  H05K3/10 ,  H05K3/40 ,  H05K3/46

CPC classification number: H05K1/0218 ,  H01P3/08 ,  H01P11/003 ,  H05K1/0219 ,  H05K1/0221 ,  H05K1/0251 ,  H05K1/112 ,  H05K3/0044 ,  H05K3/107 ,  H05K3/4007 ,  H05K3/4038 ,  H05K3/4611 ,  H05K2201/0707 ,  H05K2201/09036 ,  H05K2201/09545 ,  H05K2203/0228

Abstract: A radio frequency circuit includes at least one dielectric substrate, a trench formed in the dielectric substrate, and an electrically continuous conductive material in the trench. The radio frequency circuit further may include a first dielectric substrate, a second dielectric substrate, with the trench being formed in the first and second dielectric substrates. A method of fabricating an electromagnetic circuit includes providing at least one dielectric substrate, machining a trench in the at least one dielectric substrate, and filling the trench with an electrically conductive material to form an electrically continuous conductor.

公开(公告)号：US10074885B2

公开(公告)日：2018-09-11

申请号：US15079614

申请日：2016-03-24

Applicant: Nuvotronics, INC

Inventor： David W. Sherrer ,  John J. Fisher

IPC: H01P3/06 ,  H01P5/18 ,  H01P1/08 ,  H01P5/103 ,  H01P11/00 ,  H05K1/02 ,  H01P3/00 ,  H05K3/46

CPC classification number: H01P3/06 ,  H01P1/08 ,  H01P3/00 ,  H01P5/103 ,  H01P5/183 ,  H01P11/002 ,  H01P11/003 ,  H01P11/005 ,  H05K1/0221 ,  H05K1/0272 ,  H05K3/4644 ,  H05K3/4685 ,  H05K2201/09809 ,  Y10T29/49117 ,  Y10T29/49123

Abstract: Provided are coaxial waveguide microstructures. The microstructures include a substrate and a coaxial waveguide disposed above the substrate. The coaxial waveguide includes: a center conductor; an outer conductor including one or more walls, spaced apart from and disposed around the center conductor; one or more dielectric support members for supporting the center conductor in contact with the center conductor and enclosed within the outer conductor; and a core volume between the center conductor and the outer conductor, wherein the core volume is under vacuum or in a gas state. Also provided are methods of forming coaxial waveguide microstructures by a sequential build process and hermetic packages which include a coaxial waveguide microstructure.

公开(公告)号：US20180206334A1

公开(公告)日：2018-07-19

申请号：US15853517

申请日：2017-12-22

Applicant: InnoLux Corporation

Inventor： I-Yin LI ,  Chia-Chi HO ,  Yi-Hung LIN ,  Chen-Shuo HSIEH ,  Ker-Yih KAO

IPC: H05K1/02 ,  H05K3/00 ,  H01Q1/38

CPC classification number: H05K1/0243 ,  H01P3/082 ,  H01P11/003 ,  H01Q1/38 ,  H05K1/0271 ,  H05K3/0058

Abstract: A metal-laminated structure is provided. The metal-laminated structure includes a substrate, a compressive stress layer disposed on the substrate, and at least one metal layer disposed on the compressive stress layer, wherein the thickness ratio of the metal layer to the compressive stress layer is in a range from 1 to 30. A high-frequency device including the metal-laminated structure is also provided.

公开(公告)号：US10008458B2

公开(公告)日：2018-06-26

申请号：US15316217

申请日：2015-06-16

Applicant: SONY CORPORATION

Inventor： Kosuke Hareyama

IPC: H01L23/66 ,  H01L21/48 ,  H01L23/49 ,  H01L25/18 ,  H01P3/08 ,  H01P11/00 ,  H01L23/498

CPC classification number: H01L23/66 ,  H01L21/486 ,  H01L23/15 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/49894 ,  H01L25/18 ,  H01L2223/6611 ,  H01L2223/6616 ,  H01L2223/6627 ,  H01L2924/0002 ,  H01P3/081 ,  H01P11/003 ,  H01L2924/00

Abstract: The present technology relates to a semiconductor device and a method of manufacturing the semiconductor device capable of realizing impedance control of the semiconductor device.An input/output wiring line 23 and a ground wiring line 22 are such that through glass vias are provided so as to form a strip line structure by blasting or electric discharge machining and thereafter metal films are formed on a surface and a rear surface. It is possible to configure the semiconductor device with the impedance control by adjusting a conductor diameter of the input/output wiring line 23 and an insulating layer thickness between the input/output wiring line 23 and the ground wiring line 22. The present technology may be applied to the semiconductor device.