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公开(公告)号：US12094888B2
公开(公告)日：2024-09-17
申请号：US17278722
申请日：2021-02-05
Inventor： Tao Ma , Yong Xu , Wanglin Wen , Fei Ai
IPC: H01L27/12 , H01L29/786
CPC classification number: H01L27/1244 , H01L27/1222 , H01L27/1288 , H01L29/78675
Abstract: An array substrate includes a substrate, a first metal layer and an active layer disposed on the substrate, an interlayer insulating layer, and a second metal layer. The first metal layer forms at least one first trace, the interlayer insulating layer is disposed on the first metal layer and the active layer, the second metal layer is disposed on the interlayer insulating layer, the interlayer insulating layer is formed with a first contact hole, and the second metal layer is connected to the first trace through the first contact hole. The first metal layer includes a conductive layer and a first protective layer stacked in sequence.
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公开(公告)号：US20240027859A1
公开(公告)日：2024-01-25
申请号：US17607852
申请日：2021-09-08
Inventor： Zhilin Wu , Tao Ma , Dewei Song , Fei Ai
IPC: G02F1/1362 , G02F1/1343 , G02F1/1333 , G02F1/1368
CPC classification number: G02F1/136295 , G02F1/136209 , G02F1/1343 , G02F1/136227 , G02F1/13338 , G02F1/1368
Abstract: The present application discloses a display panel and an electrical terminal. The display panel includes: an underlay; an array driver layer located on the underlay and including a gate electrode layer and a source and drain electrode layer; a signal line including an adaptor portion located in the non-display region, wherein the adaptor portion includes a first wire section disposed in a same layer with the gate electrode layer, a second wire section disposed in a same layer with the source and drain electrode layer, and a bridge portion electrically connected to the first wire section and the second wire section; wherein the first wire section, the second wire section, and the bridge portion are disposed in different layers.
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公开(公告)号：US12140845B2
公开(公告)日：2024-11-12
申请号：US17976805
申请日：2022-10-30
IPC: G02F1/1368 , G02F1/1362 , H10K59/131
Abstract: The present disclosure provides a display panel and a display device. The display panel includes a thin film transistor; and further includes a substrate; a first metal layer disposed on the substrate and including a gate of the thin film transistor; an active layer disposed on a side of the first metal layer away from the substrate and including an active portion of the thin film transistor; a spacer layer disposed on a side of the active layer away from the first metal layer and including a plurality of contact holes; a second metal layer disposed on a side of the spacer layer away from the active layer and including a source and a drain of the thin film transistor; an orthographic projection of the gate electrode on the substrate covers an orthographic projection of at least part of the contact holes on the substrate.
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公开(公告)号：US12072594B2
公开(公告)日：2024-08-27
申请号：US17607852
申请日：2021-09-08
Inventor： Zhilin Wu , Tao Ma , Dewei Song , Fei Ai
IPC: G02F1/1368 , G02F1/1333 , G02F1/1343 , G02F1/1362
CPC classification number: G02F1/136295 , G02F1/13338 , G02F1/1343 , G02F1/136209 , G02F1/136227 , G02F1/1368
Abstract: The present application discloses a display panel and an electrical terminal. The display panel includes: an underlay; an array driver layer located on the underlay and including a gate electrode layer and a source and drain electrode layer; a signal line including an adaptor portion located in the non-display region, wherein the adaptor portion includes a first wire section disposed in a same layer with the gate electrode layer, a second wire section disposed in a same layer with the source and drain electrode layer, and a bridge portion electrically connected to the first wire section and the second wire section; wherein the first wire section, the second wire section, and the bridge portion are disposed in different layers.
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