公开(公告)号：US20120216210A1

公开(公告)日：2012-08-23

申请号：US13459398

申请日：2012-04-30

申请人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

发明人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

IPC分类号： G06F9/50

CPC分类号： G06F9/3851 ,  G06F9/50 ,  G06F11/3419 ,  G06F11/348 ,  G06F2201/88 ,  G06F2201/885

摘要： Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

摘要翻译： 处理器时间计费通过每线程内部资源使用计数器电路来增强，这些计算器电路考虑到使用它们的线程使用处理器核心资源。 可以通过检测诸如在处理器内活动的多个线程的指令分派的事件来确定相对资源的使用，其可以包括仍然占据处理器资源的空闲线程。 周期性地使用资源使用计数器的值来确定多个线程对处理器核心的相对使用。 如果所有事件在给定时间段内都是针对单个线程，则处理器时间被分配给单个线程。 如果在给定的时间段内没有发生任何事件，那么处理器的时间可以在线程之间平均分配。 如果多个线程正在生成事件，则可以为每个线程确定分数资源使用，并且可以根据其分数使用来更新计数器。

公开(公告)号：US08209698B2

公开(公告)日：2012-06-26

申请号：US12579540

申请日：2009-10-15

申请人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

发明人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

IPC分类号： G06F9/46 ,  G06F7/38

CPC分类号： G06F9/3851 ,  G06F9/50 ,  G06F11/3419 ,  G06F11/348 ,  G06F2201/88 ,  G06F2201/885

摘要： Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

摘要翻译： 处理器时间计费通过每线程内部资源使用计数器电路来增强，这些计算器电路考虑到使用它们的线程使用处理器核心资源。 可以通过检测诸如在处理器内活动的多个线程的指令分派等事件来确定相对资源的使用，这可能包括仍占用处理器资源的空闲线程。 周期性地使用资源使用计数器的值来确定多个线程对处理器核心的相对使用。 如果所有事件在给定时间段内都是针对单个线程，则处理器时间被分配给单个线程。 如果在给定的时间段内没有发生任何事件，那么处理器的时间可以在线程之间平均分配。 如果多个线程正在生成事件，则可以为每个线程确定分数资源使用，并且可以根据其分数使用来更新计数器。

公开(公告)号：US20100037233A1

公开(公告)日：2010-02-11

申请号：US12579540

申请日：2009-10-15

申请人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

发明人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

IPC分类号： G06F9/46

CPC分类号： G06F9/3851 ,  G06F9/50 ,  G06F11/3419 ,  G06F11/348 ,  G06F2201/88 ,  G06F2201/885

摘要： Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

摘要翻译： 处理器时间计费通过每线程内部资源使用计数器电路来增强，这些计算器电路考虑到使用它们的线程使用处理器核心资源。 可以通过检测诸如在处理器内活动的多个线程的指令分派等事件来确定相对资源的使用，这可能包括仍占用处理器资源的空闲线程。 周期性地使用资源使用计数器的值来确定多个线程对处理器核心的相对使用。 如果所有事件在给定时间段内都是针对单个线程，则处理器时间被分配给单个线程。 如果在给定的时间段内没有发生任何事件，那么处理器的时间可以在线程之间平均分配。 如果多个线程正在生成事件，则可以为每个线程确定分数资源使用，并且可以根据其分数使用来更新计数器。

公开(公告)号：US09003417B2

公开(公告)日：2015-04-07

申请号：US13459398

申请日：2012-04-30

申请人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

发明人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

IPC分类号： G06F9/46 ,  G06F12/00 ,  G06F9/38 ,  G06F9/50 ,  G06F11/34

CPC分类号： G06F9/3851 ,  G06F9/50 ,  G06F11/3419 ,  G06F11/348 ,  G06F2201/88 ,  G06F2201/885

摘要： Processor time accounting is enhanced by per-thread internal resource usage counter circuits that account for usage of processor core resources to the threads that use them. Relative resource use can be determined by detecting events such as instruction dispatches for multiple threads active within the processor, which may include idle threads that are still occupying processor resources. The values of the resource usage counters are used periodically to determine relative usage of the processor core by the multiple threads. If all of the events are for a single thread during a given period, the processor time is allocated to the single thread. If no events occur in the given period, then the processor time can be equally allocated among threads. If multiple threads are generating events, a fractional resource usage can be determined for each thread and the counters may be updated in accordance with their fractional usage.

摘要翻译： 处理器时间计费通过每线程内部资源使用计数器电路来增强，这些计算器电路考虑到使用它们的线程使用处理器核心资源。 可以通过检测诸如在处理器内活动的多个线程的指令分派等事件来确定相对资源的使用，这可能包括仍占用处理器资源的空闲线程。 周期性地使用资源使用计数器的值来确定多个线程对处理器核心的相对使用。 如果所有事件在给定时间段内都是针对单个线程，则处理器时间被分配给单个线程。 如果在给定的时间段内没有发生任何事件，那么处理器的时间可以在线程之间平均分配。 如果多个线程正在生成事件，则可以为每个线程确定分数资源使用，并且可以根据其分数使用来更新计数器。

公开(公告)号：US07657893B2

公开(公告)日：2010-02-02

申请号：US10422025

申请日：2003-04-23

申请人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

发明人： William Joseph Armstrong ,  Michael Stephen Floyd ,  Ronald Nick Kalla ,  Larry Scott Leitner ,  Balaram Sinharoy

IPC分类号： G06F9/46 ,  G06F9/44

CPC分类号： G06F9/3851 ,  G06F9/50 ,  G06F11/3419 ,  G06F11/348 ,  G06F2201/88 ,  G06F2201/885

摘要： An accounting method and multi-threaded processor include a mechanism for accounting for processor resource usage by threads within programs. Relative resource use is determined by detecting a particular cycle state of threads active within the processor. If instructions are dispatched for all threads or no threads, the processor cycle is accounted equally to all threads. Alternatively if no threads are in the particular cycle state, the accounting may be made using a prior state, or in conformity with ratios of the threads' priority levels. If only one thread is in the particular cycle state, that thread is accounted the entire processor cycle. If multiple threads are dispatching, but less than all threads are dispatching, the processor cycle is billed evenly across the dispatching threads.

摘要翻译： 会计方法和多线程处理器包括用于计算程序内的线程的处理器资源使用的机制。 通过检测处理器内活动的线程的特定周期状态来确定相对资源的使用。 如果为所有线程或没有线程调度指令，则处理器周期与所有线程相等。 或者，如果没有线程处于特定周期状态，则可以使用先前状态进行计费，或者根据线程的优先级的比率来进行计费。 如果只有一个线程处于特定的循环状态，则该线程将占整个处理器周期。 如果多个线程正在调度，但是少于所有线程都调度，处理器周期将在调度线程中平均计费。

公开(公告)号：US20080141000A1

公开(公告)日：2008-06-12

申请号：US12033385

申请日：2008-02-19

申请人： Michael Stephen Floyd ,  Larry Scott Leitner

发明人： Michael Stephen Floyd ,  Larry Scott Leitner

IPC分类号： G06F9/30

CPC分类号： G06F9/3851 ,  G06F9/3012 ,  G06F9/30123 ,  G06F9/3013 ,  G06F9/3842 ,  G06F9/3867 ,  G06F11/0715 ,  G06F11/0721 ,  G06F11/0757 ,  G06F11/1407

摘要： Monitoring is performed to detect a hang condition. A timer is set to detect a hang based on a core hang limit. If a thread hangs for the duration of the core hang limit, then a core hang is detected. If the thread is performing an external memory transaction, then the timer is increased to a longer memory hang limit. If the thread is waiting for a shared resource, then the timer may be increased to the longer memory hang limit if another thread or, more particularly, the thread blocking the resource has a pending memory transaction. Responsive to detecting a hang condition, instructions dispatched to the plurality of execution units may be flushed, or the processor may be reset and restored to a previously known good, checkpointed architected state.

摘要翻译： 执行监视以检测挂起状况。 一个定时器被设置为基于核心挂起限制来检测挂起。 如果线程在核心挂起限制的持续时间内挂起，则会检测到核心挂起。 如果线程正在执行外部存储器事务，则定时器增加到更长的内存挂起限制。 如果线程正在等待共享资源，则如果另一个线程，更具体地说，阻塞资源的线程具有未决的存储器事务，则定时器可​​能会增加到更长的内存挂起限制。 响应于检测挂起状况，可以刷新发送到多个执行单元的指令，或者可以将处理器复位并恢复到先前已知的良好的，检查点的架构状态。

公开(公告)号：US06529979B1

公开(公告)日：2003-03-04

申请号：US09436105

申请日：1999-11-08

申请人： Michael Stephen Floyd ,  Larry Scott Leitner ,  Kevin Franklin Reick

发明人： Michael Stephen Floyd ,  Larry Scott Leitner ,  Kevin Franklin Reick

IPC分类号： G06F1314

CPC分类号： G06F13/4217

摘要： A method and apparatus for transferring data using an on-chip bus is presented. A data transaction consisting of an address and data packet is transmitted on an on-chip bus which is a two-wire serial bus consisting of an address line and a data line that connects a plurality of satellites in a daisy-chain fashion to a central source. Each on-chip satellite is associated with a unique identifier. In response to a determination that the transaction is accepted by the satellite, which is determined by the address in the address packet positively comparing to a unique identifier for the satellite, the address packet is modified to provide a positive acknowledgment of a receipt of the address packet back to the central source of the transaction. The address packet is modified by clearing the stop bit of the address packet, i.e. gating off or negating the stop bit. Alternatively, the address packet is otherwise modified to indicate the acceptance of the packet. The source of the address packet will identify that the operation was successful by detecting that the stop bit is cleared from the framed address packet, thereby receiving the positive acknowledgment indication, thus indicating that a successful transaction occurred.

摘要翻译： 提出了使用片上总线传送数据的方法和装置。 由地址和数据分组组成的数据事务在片上总线上发送，片上总线是两线串行总线，由串行方式连接多个卫星的地址线和数据线组成， 资源。 每个片上卫星与唯一标识符相关联。 响应于确定交易被卫星接受，其由地址分组中的地址确定，与卫星的唯一标识符正相比较，地址分组被修改以提供对地址的接收的肯定确认 数据包回到交易的中心来源。 通过清除地址分组的停止位，即关闭或取消停止位来修改地址分组。 或者，地址分组被修改以指示分组的接受。 通过检测到停止位从成帧的地址分组中清除，地址分组的源将识别出操作成功，从而接收到肯定的确认指示，从而指示成功的事务发生。

公开(公告)号：US07392350B2

公开(公告)日：2008-06-24

申请号：US11055160

申请日：2005-02-10

申请人： James Stephen Fields, Jr. ,  Michael Stephen Floyd ,  Paul Frank Lecocq ,  Larry Scott Leitner ,  Kevin Franklin Reick

发明人： James Stephen Fields, Jr. ,  Michael Stephen Floyd ,  Paul Frank Lecocq ,  Larry Scott Leitner ,  Kevin Franklin Reick

IPC分类号： G06F13/28

CPC分类号： G06F9/3885 ,  G06F9/30003 ,  G06F9/30101 ,  G06F9/30181 ,  G06F12/0888

摘要： In a multiprocessor environment, by executing cache-inhibited reads or writes to registers, a scan communication is used to rapidly access registers inside and outside a chip originating the command. Cumbersome locking of the memory location may be thus avoided. Setting of busy latches at the outset virtually eliminates the chance of collisions, and status bits are set to inform the requesting core processor that a command is done and free of error, if that is the case.

摘要翻译： 在多处理器环境中，通过对寄存器执行高速缓存禁止读或写操作，使用扫描通信来快速访问发起命令的芯片内外的寄存器。 因此可以避免存储器位置的繁琐的锁定。 一开始就设置忙锁实际上消除了冲突的机会，并且设置状态位以通知请求的核心处理器完成命令并且没有错误，如果是这样的话。

公开(公告)号：US07574581B2

公开(公告)日：2009-08-11

申请号：US10425397

申请日：2003-04-28

申请人： Michael Stephen Floyd ,  Larry Scott Leitner ,  Kevin Franklin Reick ,  Kevin Dennis Woodling

发明人： Michael Stephen Floyd ,  Larry Scott Leitner ,  Kevin Franklin Reick ,  Kevin Dennis Woodling

IPC分类号： G06F15/00 ,  G06F15/76

CPC分类号： G06F15/17337

摘要： A method of communicating between processing units on different integrated circuit chips in a multi-processor computer system by issuing a command from a source processing unit to a destination processing unit, receiving the command at the destination processing unit while the destination processing unit is processing program instructions, and accessing free-running, scan registers in clock-controlled components of the destination processing unit without interrupting processing of the program instructions by the destination processing unit. The access may be a read from status or mode registers of the destination processing unit, or write to control or mode registers. Many processing units can be interconnected in a ring topology, and the access command can be passed from the source processing unit through several other processing units before reaching the destination processing unit.

摘要翻译： 一种在多处理器计算机系统中的不同集成电路芯片上的处理单元之间进行通信的方法，该方法是从源处理单元向目的地处理单元发出命令，在目的地处理单元处理程序时接收命令 指令，以及访问目的地处理单元的时钟控制组件中的自由运行的扫描寄存器，而不中断目的地处理单元对程序指令的处理。 访问可以是从目的地处理单元的状态或模式寄存器读取，或写入控制或模式寄存器。 许多处理单元可以以环形拓扑互连，并且访问命令可以在到达目的地处理单元之前通过其他几个处理单元从源处理单元传递。

公开(公告)号：US07343476B2

公开(公告)日：2008-03-11

申请号：US11055044

申请日：2005-02-10

申请人： Michael Stephen Floyd ,  Larry Scott Leitner

发明人： Michael Stephen Floyd ,  Larry Scott Leitner

IPC分类号： G06F9/30

CPC分类号： G06F9/3851 ,  G06F9/3012 ,  G06F9/30123 ,  G06F9/3013 ,  G06F9/3842 ,  G06F9/3867 ,  G06F11/0715 ,  G06F11/0721 ,  G06F11/0757 ,  G06F11/1407

摘要： Monitoring is performed to detect a hang condition. A timer is set to detect a hang based on a core hang limit. If a thread hangs for the duration of the core hang limit, then a core hang is detected. If the thread is performing an external memory transaction, then the timer is increased to a longer memory hang limit. If the thread is waiting for a shared resource, then the timer may be increased to the longer memory hang limit if another thread or, more particularly, the thread blocking the resource has a pending memory transaction. Responsive to detecting a hang condition, instructions dispatched to the plurality of execution units may be flushed, or the processor may be reset and restored to a previously known good, checkpointed architected state.

摘要翻译： 执行监视以检测挂起状况。 一个定时器被设置为基于核心挂起限制来检测挂起。 如果线程在核心挂起限制的持续时间内挂起，则会检测到核心挂起。 如果线程正在执行外部存储器事务，则定时器增加到更长的内存挂起限制。 如果线程正在等待共享资源，则如果另一个线程，更具体地说，阻塞资源的线程具有未决的存储器事务，则定时器可​​能会增加到更长的内存挂起限制。 响应于检测挂起状况，可以刷新发送到多个执行单元的指令，或者可以将处理器复位并恢复到先前已知的良好的，检查点的架构状态。