公开(公告)号：US5060137A

公开(公告)日：1991-10-22

申请号：US229750

申请日：1988-08-03

申请人： William R. Bryg ,  Michael E. Gardner ,  Steven C. Boettner

发明人： William R. Bryg ,  Michael E. Gardner ,  Steven C. Boettner

IPC分类号： G06F12/10

CPC分类号： G06F12/1027

摘要： Explicit instructions are provided that enable software to directly control insertion of information into a translation lookaside buffer (TLB). A first pair of instructions enable information to be inserted into a data TLB and a second pair of instructions enable information to be inserted into an instruction TLB. In each of these pairs, the first instruction inserts the virtual address and the associated physical address. In response to the second instruction of each of these pairs, additional information about that physical page, such as protection information and flags, is inserted.

摘要翻译： 提供显式指令，使软件能够直接控制信息插入到翻译后备缓冲器（TLB）中。 第一对指令使得能够将信息插入到数据TLB中，并且第二对指令使得能够将信息插入到指令TLB中。 在每个这些对中，第一条指令插入虚拟地址和相关联的物理地址。 响应于这些对中的每一个的第二指令，插入关于该物理页面的附加信息，例如保护信息和标志。

公开(公告)号：US4777589A

公开(公告)日：1988-10-11

申请号：US750578

申请日：1985-06-28

申请人： Steven C. Boettner ,  William R. Bryg ,  David V. James ,  Tso-Kai Liu ,  Michael J. Mahon ,  Terrence C. Miller ,  William S. Worley, Jr.

发明人： Steven C. Boettner ,  William R. Bryg ,  David V. James ,  Tso-Kai Liu ,  Michael J. Mahon ,  Terrence C. Miller ,  William S. Worley, Jr.

IPC分类号： G06F12/10 ,  G06F12/02 ,  G06F12/06 ,  G06F12/14 ,  G06F12/08

CPC分类号： G06F12/1475 ,  G06F12/0292 ,  G06F12/0653 ,  G06F2212/206

摘要： A virtual memory system is used to control access to I/O device address space in accordance with a preferred embodiment of the present invention. In a virtual memory system, access to pages within a processor's address space are assigned to each application program. Each I/O device is assigned two pages of address space. One page is considered to be privileged, and the other unprivileged. Each I/O device register is associated with an address in each of the two pages of its I/O device address space. Address space is global. What is meant by global is that physical memory locations map to the same virtual memory space regardless of what process is running on the processor. Access codes accompanied by a write disable bit are used to control process access to various addresses.