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Patent Agency Ranking
公开(公告)号：US09563117B2
公开(公告)日：2017-02-07
申请号：US14793728
申请日：2015-07-07
Applicant: Winbond Electronics Corp.
Inventor： Yung-Wen Hung
Abstract: A mask assembly including a first mask and a second mask is provided. The first mask includes a plurality of first main features parallel to each other, a plurality of first sub-resolution assistant features (SRAFs) and a plurality of second SRAFs. The second SRAFs are separately disposed at one side of the first main features. The first SRAFs are separately disposed between the first main features and the second SRAFs. An extension direction of the first main features is parallel to an extension direction of the second SRAFs. The second mask includes a plurality of second main features parallel to each other. When the first mask and the second mask are placed at a predetermined position above a negative-type development photoresist layer for performing exposure respectively, the second main features intersect with the first main features and the second main features overlap with the first SRAFs.
Abstract translation: 提供了包括第一掩模和第二掩模的掩模组件。 第一掩模包括彼此平行的多个第一主要特征，多个第一子分辨率辅助特征（SRAF）和多个第二SRAF。 第二SRAF分别设置在第一主要特征的一侧。 第一SRAF分开设置在第一主要特征和第二SRAF之间。 第一主要特征的延伸方向平行于第二SRAF的延伸方向。 第二掩模包括彼此平行的多个第二主要特征。 当第一掩模和第二掩模被放置在分别用于进行曝光的负型显影光致抗蚀剂层上方的预定位置时，第二主要特征与第一主要特征相交，并且第二主要特征与第一SRAF重叠。
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公开(公告)号：US20210351131A1
公开(公告)日：2021-11-11
申请号：US17380033
申请日：2021-07-20
Applicant: Winbond Electronics Corp.
Inventor： Chia-Jung Chuang , Isao Tanaka , Yung-Wen Hung , Chao-Yi Huang
IPC: H01L23/528 , H01L23/522 , H01L27/108 , G03F7/20 , H01L21/762 , H01L49/02
Abstract: A memory device includes a word line, a bit line, an active region and a bit line contact structure. The word line is disposed in the substrate, and extends along a first direction. The bit line is disposed over the substrate, and extends along a second direction. The active region is disposed in the substrate, and extends along a third direction. The bit line contact structure is disposed between the active region and the bit line. A top view pattern of the bit line contact structure has a long axis. An angle between the extending direction of this long axis and the third direction is less than an angle between the extending direction of this long axis and the first direction, and is less than an angle between the extending direction of this long axis and the second direction.
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公开(公告)号：US11854972B2
公开(公告)日：2023-12-26
申请号：US17380033
申请日：2021-07-20
Applicant: Winbond Electronics Corp.
Inventor： Chia-Jung Chuang , Isao Tanaka , Yung-Wen Hung , Chao-Yi Huang
IPC: H01L23/528 , H01L23/522 , G03F7/00 , H01L21/762 , H01L49/02 , H10B12/00
CPC classification number: H01L23/5283 , G03F7/7015 , H01L21/76224 , H01L23/5226 , H01L28/60 , H10B12/053 , H10B12/31 , H10B12/34 , H10B12/482 , H10B12/485 , H10B12/488
Abstract: A memory device includes a word line, a bit line, an active region and a bit line contact structure. The word line is disposed in the substrate, and extends along a first direction. The bit line is disposed over the substrate, and extends along a second direction. The active region is disposed in the substrate, and extends along a third direction. The bit line contact structure is disposed between the active region and the bit line. A top view pattern of the bit line contact structure has a long axis. An angle between the extending direction of this long axis and the third direction is less than an angle between the extending direction of this long axis and the first direction, and is less than an angle between the extending direction of this long axis and the second direction.
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公开(公告)号：US20210082813A1
公开(公告)日：2021-03-18
申请号：US16571196
申请日：2019-09-16
Applicant: Winbond Electronics Corp.
Inventor： Chia-Jung Chuang , Isao Tanaka , Yung-Wen Hung , Chao-Yi Huang
IPC: H01L23/528 , H01L23/522 , H01L27/108 , H01L21/762 , H01L49/02 , G03F7/20
Abstract: A memory device and a manufacturing method thereof are provided. The memory device includes a word line, a bit line, an active region and a bit line contact structure. The word line is disposed in the substrate, and extends along a first direction. The bit line is disposed over the substrate, and extends along a second direction. The active region is disposed in the substrate, and extends along a third direction. The bit line contact structure is disposed between the active region and the bit line. A top view pattern of the bit line contact structure has a long axis. An angle between the extending direction of this long axis and the third direction is less than an angle between the extending direction of this long axis and the first direction, and is less than an angle between the extending direction of this long axis and the second direction.
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公开(公告)号：US11114380B2
公开(公告)日：2021-09-07
申请号：US16571196
申请日：2019-09-16
Applicant: Winbond Electronics Corp.
Inventor： Chia-Jung Chuang , Isao Tanaka , Yung-Wen Hung , Chao-Yi Huang
IPC: H01L23/528 , H01L23/522 , H01L27/108 , G03F7/20 , H01L21/762 , H01L49/02
Abstract: A memory device and a manufacturing method thereof are provided. The memory device includes a word line, a bit line, an active region and a bit line contact structure. The word line is disposed in the substrate, and extends along a first direction. The bit line is disposed over the substrate, and extends along a second direction. The active region is disposed in the substrate, and extends along a third direction. The bit line contact structure is disposed between the active region and the bit line. A top view pattern of the bit line contact structure has a long axis. An angle between the extending direction of this long axis and the third direction is less than an angle between the extending direction of this long axis and the first direction, and is less than an angle between the extending direction of this long axis and the second direction.
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