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公开(公告)号:US20170162150A1
公开(公告)日:2017-06-08
申请号:US14786071
申请日:2015-09-21
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Juncheng XIAO , Shangcao CAO , Yao YAN , Ronglei DAI
IPC: G09G3/36
CPC classification number: G09G3/3677 , G02F1/133 , G09G3/36 , G09G3/3696 , G09G2300/0408 , G09G2300/0871 , G09G2310/0202 , G09G2310/08
Abstract: A liquid crystal display device and a gate driving circuit are disclosed. The gate driving circuit includes multiple-stage gate driving units and a control chip. Each stage gate driving unit includes a first pulling control unit, a first pulling unit, a second pulling control unit, a second pulling unit, a first control unit, a second control unit and a third control unit. The control chip is used for pulling a first clock signal and a first voltage reference signal to a first voltage level. Accordingly, the scanning lines driven by the gate driving circuit are all turned on in order to stably realize an All-Gate-On function.
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公开(公告)号:US20170154594A1
公开(公告)日:2017-06-01
申请号:US14785907
申请日:2015-09-21
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Juncheng XIAO , Ronglei DAI , Yao YAN , Shangcao CAO
IPC: G09G3/36
CPC classification number: G09G3/3677 , G02F1/13454 , G09G3/3696 , G09G2300/0408 , G09G2300/0426 , G09G2300/0871 , G09G2310/08
Abstract: A liquid crystal display device and a gate driving circuit are disclosed. The gate driving circuit includes multiple-stage gate driving units and a control chip. Each stage gate driving unit includes a first pulling control unit, a first pulling unit, a second pulling control unit, a second pulling unit, a first reset unit, a second reset unit. The control chip is used for pulling a first clock signal and a first voltage reference signal to a first voltage level. Accordingly, the scanning lines driven by the gate driving circuit are all turned on in order to stably realize an All-Gate-On function.
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公开(公告)号:US20190011744A1
公开(公告)日:2019-01-10
申请号:US16127767
申请日:2018-09-11
Inventor: Yao YAN , Shangcao CAO
IPC: G02F1/1368 , H01L27/12
Abstract: The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to form the MIS storage capacitor by the P—Si semiconductor layer, the first metal layer and the insulating layer between above or the P—Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P—Si in the P—Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P—Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.
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公开(公告)号:US20190004352A1
公开(公告)日:2019-01-03
申请号:US16126078
申请日:2018-09-10
Inventor: Yao YAN , Shangcao CAO
IPC: G02F1/1368 , H01L27/12
Abstract: The array substrate, the liquid crystal display panel and the liquid crystal display device of the present disclosure are designed to from the MIS storage capacitor by the P-Si semiconductor layer, the first metal layer and the insulating layer between above or the P-Si semiconductor layer, the second metal layer and the dielectric spacer layer between above, when one side of the first metal layer or the second metal layer receiving the negative gray voltage, the P-Si in the P-Si semiconductor layer will gather to form the hole, when receiving the positive gray voltage, will form the depletion layer on the upper layer of the P-Si to reduce the capacity of the MIS storage capacitor, thereby reducing the difference of the capacitance when the MIS storage capacitor in the positive and negative gray voltage, improving the flicker phenomena and ensuring the display effect.
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公开(公告)号:US20170256224A1
公开(公告)日:2017-09-07
申请号:US14915222
申请日:2016-01-05
Inventor: Juncheng XIAO , Shangcao CAO , Ronglei DAI , Yao YAN
IPC: G09G3/36
CPC classification number: G09G3/3677 , G06F3/0416 , G09G2300/0408 , G09G2310/0251 , G09G2310/0283 , G09G2310/0286 , G09G2310/08
Abstract: A GOA driving circuit, a TFT display panel and a display device are disclosed. The GOA driving circuit includes: an input module configured for outputting first control signals in accordance with the received display scanning signals and the touch scanning signals; an output module configured for outputting the first output control signals in accordance with the first control signals and the first clock signals; a pull-down module configured for outputting pull-down signals in accordance with the first control signals, the second control signals and the low level signals; and a pull-down maintaining module configure for outputting the second output control signals in accordance with the pull-down signals, the high level signals, and the first clock signals. The DC source is adopted to charge/discharge Qn to keep Qn at a reasonable level, and the transfer capability is enhanced. In addition, the forward scanning and the backward scanning may be implemented.
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公开(公告)号:US20170212397A1
公开(公告)日:2017-07-27
申请号:US15075188
申请日:2016-03-20
Inventor: Shangcao CAO
IPC: G02F1/1362 , G02F1/1335 , G02F1/1368 , G02F1/1333 , H01L27/12 , H01L29/786
CPC classification number: G02F1/136213 , G02F2001/134372 , H01L27/1255 , H01L29/78633
Abstract: The present disclosure discloses an array substrate and a liquid crystal display, the array substrate includes: a substrate; a thin film transistor disposed on the substrate; a conductive layer disposed on the thin film transistor and connected with a drain electrode of the thin film transistor; a common electrode disposed on the conductive layer and forming a first capacitor with the conductor layer; a pixel electrode disposed on the common electrode and connected with the conductive layer, the pixel electrode and the common electrode form a second capacitor. By the method above, the disclosure is capable of increasing capacitance of storage capacitors and improving optical performance of a display.
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公开(公告)号:US20170169784A1
公开(公告)日:2017-06-15
申请号:US14889423
申请日:2015-10-21
Applicant: Shenzhen China Star Optoelectronics Technology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Juncheng XIAO , Shangcao CAO , Ronglei DAI , Yao YAN
CPC classification number: G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0251 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G11C19/28 , H01L27/124
Abstract: A GOA circuit, a display device, and a driving method of GOA circuit are disclosed. A N-th level GOA unit is configured for charging the N-th level horizontal scanning line (G(N)) within a display area of the display device. The N-th level horizontal scanning line (G(N)) connects to GAS. In response to the GAS, the horizontal scanning lines corresponding to all of the GOA units are in a charging state. In this way, the horizontal scanning lines at each level are connected to the GAS, such that when the GAS are valid, the corresponding horizontal scanning line at each level are in the charging state of in an on-state so as to realize the All Gate On function.
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公开(公告)号:US20170262115A1
公开(公告)日:2017-09-14
申请号:US14909178
申请日:2015-11-23
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Shangcao CAO , Juncheng XIAO
IPC: G06F3/041 , G02F1/1333 , G02F1/1345 , G06F3/044
CPC classification number: G06F3/0416 , G02F1/13338 , G02F1/13454 , G06F1/3262 , G06F3/044 , G09G3/20 , G09G3/36 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G09G2354/00 , G11C19/28
Abstract: A gate driver includes a plurality of gate driver units. Each of the gate driver units includes a GOA driving circuit and at least one buffer GOA driving circuits at multiple levels. The GOA driving circuit outputs output signals during a display stage, wherein the output signals are transmitted to gate lines and the buffer GOA driving circuits at multiple levels. The output signals are transmitted between the levels when the buffer GOA driving circuits at the multiple levels are during a touch stage, and the output signals are transmitted to the GOA driving circuit of the driving unit at the next level. In addition, a touch panel includes the above gate driver.
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公开(公告)号:US20170193944A1
公开(公告)日:2017-07-06
申请号:US14900684
申请日:2015-10-21
Applicant: Shenzhen China Star OptoelectronicsTechnology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Juncheng XIAO , Ronglei DAI , Shangcao CAO , Yao YAN
IPC: G09G3/36
CPC classification number: G09G3/3677 , G02F1/136286 , G02F1/1368 , G02F2203/64 , G09G2300/0408 , G09G2310/0245 , G09G2310/0286 , G09G2310/08 , G09G2320/0214 , G09G2330/026 , G11C19/28
Abstract: The disclosure provides a GOA circuit, a driving method thereof and a liquid crystal display device. The GOA circuit comprises a plurality of GOA units connected in cascade, wherein the N-stage GOA unit comprises a N-stage stage circuit, a N-stage Q point control circuit, a N-stage P point circuit, a N-stage output circuit and a switch circuit. The switch circuit is connected to the N-stage scan line for sending a turn-on signal to the N-stage scan line before the liquid crystal display device displays an image such that the thin-film transistor in the pixel connected to the N-stage scan line turns on. The disclosure may turn on the gate of each pixel when the display device is waken from the black screen to prevent the electricity leakage when the display device is wakened from the black screen, and may also increase the stability of the circuit.
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公开(公告)号:US20170162151A1
公开(公告)日:2017-06-08
申请号:US14786088
申请日:2015-09-23
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor: Shangcao CAO
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3696 , G09G2300/0408 , G09G2300/0426 , G09G2300/0809 , G09G2310/0213 , G09G2310/0289 , G09G2310/08
Abstract: The application disclosure a GOA circuit and a liquid crystal display. The GOA circuit including a plurality of GOA unit connected in series, wherein a Nth level GOA unit including a fifth transistor, a eighth transistor and a leakage control module. wherein the leakage control module is connected in series between the Nth level gate terminal signal and the drain terminal of the eighth transistor and/or between the Nth level pull-down signal and the drain terminal of the fifth transistor; in the valid period of the Nth level scanning signal can block the Nth level gate terminal signal through the leakage pathway of the eighth transistor and/or to block the Nth level pull-down signal through the leakage pathway of the fifth transistor to achieve the stability of the GOA circuit.
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