公开(公告)号：US20230238305A1

公开(公告)日：2023-07-27

申请号：US18157033

申请日：2023-01-19

Applicant: XINTEC INC.

Inventor： Ching-Ting PENG ,  Sheng-Hsiang FU ,  Hsin-Yi CHEN

IPC: H01L23/48 ,  H01L23/00 ,  H01L21/784 ,  H01L21/304 ,  H01L21/308 ,  H01L21/683

CPC classification number: H01L23/481 ,  H01L24/05 ,  H01L24/03 ,  H01L24/32 ,  H01L21/784 ,  H01L21/304 ,  H01L21/3086 ,  H01L21/6835 ,  H01L2224/02381 ,  H01L2224/02317 ,  H01L2224/05073 ,  H01L2224/05575 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/05567 ,  H01L2224/32225 ,  H01L2221/68372

Abstract: A chip package includes a semiconductor substrate, a conductive pad, an isolation layer, and a redistribution layer. The semiconductor substrate has a first surface, a second surface facing away from the first surface, a through hole through the first and second surfaces, and a recess in the first surface. The conductive pad is located on the second surface of the semiconductor substrate and in the through hole. The isolation layer is located on the second surface of the semiconductor substrate and surrounds the conductive pad. The redistribution layer is located on the first surface of the semiconductor substrate, and extends into the recess, and extends onto the conductive pad in the through hole.