CHIP PACKAGE AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20230081775A1

    公开(公告)日:2023-03-16

    申请号:US17895643

    申请日:2022-08-25

    申请人: XINTEC INC.

    摘要: A chip package includes a semiconductor substrate, an interlayer dielectric (ILD) layer, a first metal shielding layer, and a redistribution layer. The semiconductor substrate has a first surface, a second surface facing away from the first surface, an inclined sidewall adjoining the first and second surfaces, and a through hole through the first and second surfaces. The ILD layer is located on the first surface of the semiconductor substrate, and a first conductive pad structure and a second conductive pad structure are disposed in the ILD layer. The first metal shielding layer is located on the ILD layer. A portion of the first metal shielding layer is located in the ILD layer and on the second conductive pad structure. The redistribution layer is located on the second surface of the semiconductor substrate, a wall surface of the through hole, and the first conductive pad structure.