公开(公告)号：US20210082841A1

公开(公告)日：2021-03-18

申请号：US17023199

申请日：2020-09-16

Applicant: XINTEC INC.

Inventor： Po-Han LEE ,  Chia-Ming CHENG ,  Jiun-Yen LAI ,  Ming-Chung CHUNG ,  Wei-Luen SUEN

IPC: H01L23/66 ,  H01L23/00 ,  H01L23/552 ,  H01L21/3213

Abstract: A chip package includes a semiconductor substrate, a supporting element, an antenna layer, and a redistribution layer. The semiconductor substrate has an inclined sidewall and a conductive pad that protrudes from the inclined sidewall. The supporting element is located on the semiconductor substrate, and has a top surface facing away from the semiconductor substrate, and has an inclined sidewall adjoining the top surface. The antenna layer is located on the top surface of the supporting element. The redistribution layer is located on the inclined sidewall of the supporting element, and is in contact with a sidewall of the conductive pad and an end of the antenna.

公开(公告)号：US20240351865A1

公开(公告)日：2024-10-24

申请号：US18622059

申请日：2024-03-29

Applicant: Xintec Inc.

Inventor： Jiun-Yen LAI ,  Wei-Luen SUEN ,  Ming-Chung CHUNG ,  Chih-Wei LIU

IPC: B81C1/00

CPC classification number: B81C1/00825 ,  B81C2201/013 ,  B81C2201/0143 ,  B81C2201/0146 ,  B81C2201/0159

Abstract: A manufacturing method of a micro electro mechanical system (MEMS) device includes forming a buffer protection layer on a semiconductor structure, wherein the semiconductor structure includes a wafer, a MEMS membrane, and an isolation layer between the wafer and the MEMS membrane, and the buffer protection layer is located in a slit of the MEMS membrane and on a surface of the MEMS membrane facing away from the isolation layer; etching the wafer to form a cavity such that a portion of the isolation layer is exposed though the cavity; etching the portion of the isolation layer; and removing the buffer protection layer.

公开(公告)号：US20220069454A1

公开(公告)日：2022-03-03

申请号：US17407068

申请日：2021-08-19

Applicant: XINTEC INC.

Inventor： Jiun-Yen LAI ,  Ming-Chung CHUNG ,  Wei-Luen SUEN

IPC: H01Q1/38 ,  H01Q1/52

Abstract: An antenna device includes a first substrate, a second substrate, an antenna layer, and a redistribution layer. The first substrate has a first surface, a second surface opposite to the first surface, and an inclined sidewall adjoining the first and second surfaces. The second substrate is below the first substrate. The first surface of the first substrate faces toward the second substrate. The antenna layer is located on the first surface of the first substrate. The redistribution layer extends from the second surface of the first substrate to the second substrate along the inclined sidewall of the first substrate, and the redistribution layer has a first section in contact with an end of the antenna layer.

公开(公告)号：US20140197536A1

公开(公告)日：2014-07-17

申请号：US14152970

申请日：2014-01-10

Applicant: XINTEC INC.

Inventor： Ming-Chung CHUNG

IPC: H01L23/498 ,  H01L21/82 ,  H01L21/768

CPC classification number: H01L21/76885 ,  H01L21/561 ,  H01L23/3114 ,  H01L23/3171 ,  H01L24/94 ,  H01L24/97 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2224/83 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2924/014

Abstract: The invention provides an electronic device package and method for manufacturing thereof. The electronic device package includes a substrate, an electronic chip, a bonding pad, a first passivation layer, a conductive layer, a second passivation layer, and a solder ball. The conductive layer has a first side end and a second side end, and the solder ball is positioned on the first side end of the conductive layer. The second passivation layer contacts with both the upper surface and the sidewall of the second side end of the conductive layer, and the first passivation layer contacts with the lower surface of the second side end of the conductive layer, so as to completely encapsulate the second end of the conductive layer. The electronic device package accordingly prevents the moisture penetration and to enhance the reliability of the electronic device.

Abstract translation: 本发明提供一种电子器件封装及其制造方法。 电子器件封装包括衬底，电子芯片，焊盘，第一钝化层，导电层，第二钝化层和焊球。 导电层具有第一侧端和第二侧端，并且焊球位于导电层的第一侧端。 第二钝化层与导电层的第二侧端的上表面和侧壁接触，并且第一钝化层与导电层的第二侧端的下表面接触，以便完全封装第二钝化层 导电层的端部。 因此，电子装置封装防止了水分渗透并提高了电子设备的可靠性。