Method and apparatus for correlating global positioning system (GPS) pseudorandom noise (PRN) codes
    1.
    发明授权
    Method and apparatus for correlating global positioning system (GPS) pseudorandom noise (PRN) codes 有权
    用于全球定位系统(GPS)伪随机噪声(PRN)码相关的方法和装置

    公开(公告)号:US09071342B1

    公开(公告)日:2015-06-30

    申请号:US13081746

    申请日:2011-04-07

    IPC分类号: H04B1/709 G01S19/30

    CPC分类号: H04B1/709 G01S19/30

    摘要: In accordance with the teachings described herein, system and methods are provided for a GPS acquisition correlation scheme with a reduced memory requirement. An example system may include a memory, a local PRN code generator, correlators, adder trees, an accumulator, and an output memory. The memory may be used to store an input PRN code. The local PRN code generator generates a replica PRN code and outputs a replica PRN code. The local PRN code generator may also shift the replica PRN code for each output epoch. One or more correlators receive the input PRN code and the replica PRN code and compare a bit of the input PRN code to a bit of the replica PRN code and generates a comparison. The adder trees add the comparisons and generate a comparison output. An accumulator accumulates the comparison output and outputs an accumulated output to an output memory.

    摘要翻译: 根据本文所述的教导,为具有减少的存储器需求的GPS采集相关方案提供了系统和方法。 示例系统可以包括存储器,本地PRN码发生器,相关器,加法器树,累加器和输出存储器。 存储器可以用于存储输入PRN码。 本地PRN代码生成器生成副本PRN代码并输出副本PRN代码。 本地PRN码发生器也可以移位每个输出时期的副本PRN码。 一个或多个相关器接收输入PRN码和副本PRN码,并将输入PRN码的一位与副本PRN码的位进行比较,并产生比较。 加法器树添加比较并生成比较输出。 累加器累加比较输出,并将累积的输出输出到输出存储器。

    Buffering techniques for rapid processing of samples of signals modulated with periodic waveforms
    2.
    发明授权
    Buffering techniques for rapid processing of samples of signals modulated with periodic waveforms 有权
    用周期性波形调制的信号采样的快速处理缓冲技术

    公开(公告)号:US08514129B1

    公开(公告)日:2013-08-20

    申请号:US13051114

    申请日:2011-03-18

    IPC分类号: G01S19/35

    CPC分类号: G01S19/35 G01S19/37

    摘要: Apparatus having corresponding methods and non-transitory computer-readable media comprise: a sampler configured to sample a signal, wherein the signal is modulated with a waveform having a known period, wherein the sampler obtains K samples in each period, and wherein each of the samples is N bits long, wherein K is an integer greater than 0, and N is an integer greater than 1; a memory bank, wherein the memory bank has M columns and K rows, wherein each column is N bits wide, and wherein M is an integer greater than 0; a write controller configured to write the samples to the memory bank in column order; a read controller configured to read the samples from the memory bank in row order; and an integrator configured to integrate the samples read from the memory bank, wherein the integrator provides a respective integration result for each row.

    摘要翻译: 具有相应方法和非暂时计算机可读介质的装置包括:采样器,被配置为对信号进行采样,其中所述信号用具有已知周期的波形进行调制,其中所述采样器在每个周期中获得K个采样, 样本是N位长,其中K是大于0的整数,N是大于1的整数; 存储体,其中所述存储体具有M列和K行,其中每列为N位宽,并且其中M为大于0的整数; 写入控制器,其被配置为以列的顺序将所述样本写入所述存储体; 读取控制器,其被配置为以行的顺序从存储体读取样品; 以及积分器,被配置为对从存储体读取的样本进行积分,其中积分器为每行提供相应的积分结果。

    Combined digital down conversion (DDC) and decimation filter
    3.
    发明授权
    Combined digital down conversion (DDC) and decimation filter 有权
    组合数字下变频(DDC)和抽取滤波器

    公开(公告)号:US08331494B1

    公开(公告)日:2012-12-11

    申请号:US12624353

    申请日:2009-11-23

    申请人: Mao Yu Xiangdong Jin

    发明人: Mao Yu Xiangdong Jin

    IPC分类号: H03K9/06

    CPC分类号: H03H17/0664 H03H2218/04

    摘要: In one embodiment, an analog-to-digital converter (ADC) receives a radio frequency (RF) signal and converts the RF signal into a digital signal at an intermediate frequency. The ADC uses a sampling frequency that is a multiple of the intermediate frequency to perform the conversion. A selector receives the digital signal and outputs a combined in phase and quadrature signal at a plurality of sampling points based on the sampling frequency. A filter receives the combined in phase and quadrature signal and outputs a baseband in phase baseband signal and a baseband quadrature baseband signal.

    摘要翻译: 在一个实施例中,模数转换器(ADC)接收射频(RF)信号并将RF信号转换成中频的数字信号。 ADC使用中频倍数的采样频率进行转换。 选择器接收数字信号,并且基于采样频率在多个采样点输出组合的同相和正交信号。 滤波器接收组合的同相和正交信号,并输出基带相位基带信号和基带正交基带信号。

    Zero delay reduced memory GPS PRN code interpolation
    4.
    发明授权
    Zero delay reduced memory GPS PRN code interpolation 失效
    零延迟减少内存GPS PRN代码插值

    公开(公告)号:US08675712B1

    公开(公告)日:2014-03-18

    申请号:US13080955

    申请日:2011-04-06

    IPC分类号: H04B1/00

    CPC分类号: G01S19/254 G01S19/30

    摘要: In accordance with the teachings described herein, system and methods are provided for a GPS PRN code interpolation scheme with a reduced memory requirement. An example GPS receiver system may include a memory, a local PRN code generator, and an interpolator. The memory may be used to store GPS PRN code received from a global positioning satellite. The local PRN code generator generates a replica PRN code having a repeating code that includes at least a first epoch and a second epoch. The interpolator determines an offset point in the first epoch of replica PRN code and interpolates the replica PRN code at a predetermined sample rate to generate an interpolated replica PRN code for use in correlating with the GPS PRN code.

    摘要翻译: 根据本文所述的教导,为具有减少的存储器要求的GPS PRN码插值方案提供了系统和方法。 示例性GPS接收机系统可以包括存储器,本地PRN码发生器和内插器。 存储器可以用于存储从全球定位卫星接收的GPS PRN码。 本地PRN代码生成器生成具有至少包括第一纪元和第二纪元的重复代码的副本PRN代码。 内插器确定复制PRN码的第一纪元中的偏移点,并以预定采样率内插副本PRN码,以产生用于与GPS PRN码相关的内插副本PRN码。

    Session-based sequence checking
    5.
    发明授权
    Session-based sequence checking 有权
    基于会话的序列检查

    公开(公告)号:US07990861B1

    公开(公告)日:2011-08-02

    申请号:US11278475

    申请日:2006-04-03

    CPC分类号: H04L1/1832

    摘要: A device may include logic configured to receive a data unit intended for a destination device and to obtain information from the data unit. The logic may be configured to identify a window using the obtained information, where the window has a range determined by a lower boundary and an upper boundary. The logic may be configured to forward the data unit to the destination device when a portion of the data unit information is within the window.

    摘要翻译: 设备可以包括被配置为接收旨在用于目的地设备的数据单元并且从数据单元获取信息的逻辑。 逻辑可以被配置为使用获得的信息来识别窗口,其中窗口具有由下边界和上边界确定的范围。 逻辑可以被配置为当数据单元信息的一部分在窗口内时将数据单元转发到目的地设备。

    Linked list traversal with reduced memory accesses
    6.
    发明授权
    Linked list traversal with reduced memory accesses 有权
    链接列表遍历,减少内存访问

    公开(公告)号:US07930516B1

    公开(公告)日:2011-04-19

    申请号:US12551066

    申请日:2009-08-31

    CPC分类号: G06F17/30958 G06F17/3033

    摘要: A linked list traversal system identifies when a linked list has become inefficient, either through attack or an undue multiplicity of collisions. A data unit is parsed to extract a key. A first hash result associated with the key is calculated based on a first hash function. A first linked list is identified based on the first hash result. It is determined whether the first linked list has been compromised. A second hash result associated with the key is calculated based on a second hash function when the first linked list has been compromised. A second linked list is established based on the second hash result, where the second hash result is different from the first hash result.

    摘要翻译: 链表遍历系统通过攻击或不正当的多重冲突来识别链表何时变得无效。 解析数据单元以提取密钥。 基于第一哈希函数来计算与密钥相关联的第一哈希结果。 基于第一哈希结果识别第一链表。 确定第一个链表是否已被破坏。 当第一个链表被破坏时,基于第二哈希函数计算与密钥相关联的第二哈希结果。 基于第二哈希结果建立第二链表,其中第二哈希结果与第一哈希结果不同。

    Linked list traversal with reduced memory accesses
    7.
    发明授权
    Linked list traversal with reduced memory accesses 有权
    链接列表遍历,减少内存访问

    公开(公告)号:US07600094B1

    公开(公告)日:2009-10-06

    申请号:US11427952

    申请日:2006-06-30

    IPC分类号: G06F9/26 G06F9/34 G06F17/00

    CPC分类号: G06F17/30958 G06F17/3033

    摘要: A linked list traversal system identifies when a linked list has become inefficient, either through attack or an undue multiplicity of collisions. A data unit is parsed to extract a key. A first hash result associated with the key is calculated based on a first hash function. A first linked list is identified based on the first hash result. It is determined whether the first linked list has been compromised. A second hash result associated with the key is calculated based on a second hash function when the first linked list has been compromised. A second linked list is established based on the second hash result, where the second hash result is different from the first hash result.

    摘要翻译: 链表遍历系统通过攻击或不正当的多重冲突来识别链表何时变得无效。 解析数据单元以提取密钥。 基于第一哈希函数来计算与密钥相关联的第一哈希结果。 基于第一哈希结果识别第一链表。 确定第一个链表是否已被破坏。 当第一个链表被破坏时,基于第二哈希函数计算与密钥相关联的第二哈希结果。 基于第二哈希结果建立第二链表,其中第二哈希结果与第一哈希结果不同。

    Signal mixer having a single-ended input and a differential output
    8.
    发明授权
    Signal mixer having a single-ended input and a differential output 有权
    信号混频器具有单端输入和差分输出

    公开(公告)号:US08577322B1

    公开(公告)日:2013-11-05

    申请号:US13012624

    申请日:2011-01-24

    IPC分类号: H04B1/26

    摘要: A single-ended-to-differential mixer includes a differential pair amplifier, a passive current source, a cancellation sub-circuit, and a mixer. The differential pair amplifier is configured to receive a single-ended input signal. The differential pair amplifier includes a first input, a second input, a first output, and a second output. The passive current source is connected between (i) the differential pair amplifier and (ii) a reference potential. The cancellation sub-circuit is connected to each of the first input, the second input, the first output, and the second output of the differential pair amplifier. The cancellation sub-circuit is configured to at least partially cancel a non-linearity of the differential pair amplifier. The mixer is connected to each of the first output and the second output of the differential pair amplifier.

    摘要翻译: 单端到差分混频器包括差分对放大器,无源电流源,抵消子电路和混频器。 差分对放大器被配置为接收单端输入信号。 差分对放大器包括第一输入,第二输入,第一输出和第二输出。 无源电流源连接在(i)差分对放大器和(ii)参考电位之间。 消除子电路连接到差动对放大器的第一输入端,第二输入端,第一输出端和第二输出端中的每一个。 取消子电路被配置为至少部分地消除差分对放大器的非线性。 混频器连接到差分对放大器的第一输出和第二输出中的每一个。