公开(公告)号：US09735734B2

公开(公告)日：2017-08-15

申请号：US12243232

申请日：2008-10-01

申请人： Fenghao Mu ,  Fredrik Tillman

发明人： Fenghao Mu ,  Fredrik Tillman

IPC分类号： H04B1/26 ,  H03D7/14 ,  H03D7/16

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/165 ,  H03D2200/0023 ,  H03D2200/0043 ,  H03D2200/0084 ,  H03D2200/0088

摘要： A configurable passive mixer is described herein. According to one exemplary embodiment, the passive mixer comprises a clock generator, a controller, and a plurality of passive mixer cores connected in parallel. The clock generator comprises a local oscillator drive unit for each passive mixer core. The controller varies an effective transistor size of the passive mixer by separately configuring each of the passive mixer cores to enable/disable each passive mixer core. For example, the controller may selectively enable one or more of the passive mixer cores to vary the effective transistor width of the passive mixer. As the performance requirements and/or the operating communication standard change, the controller may re-configure each passive mixer core.

公开(公告)号：US09712198B1

公开(公告)日：2017-07-18

申请号：US15156986

申请日：2016-05-17

申请人： Samsung Electronics Co., Ltd.

发明人： Quan Zhou ,  Zhiyu Yang

IPC分类号： H04B1/40 ,  H04B17/00 ,  H04W24/00 ,  H04B1/10 ,  H03D7/16 ,  H04B17/21 ,  H04B1/30

CPC分类号： H04B17/21 ,  H03D7/165 ,  H03D7/18 ,  H03D2200/0045 ,  H03D2200/005 ,  H03D2200/0052 ,  H03D2200/0066 ,  H03D2200/0082 ,  H03D2200/0088

摘要： An apparatus and method. The method includes filtering an output of an in-phase (I-mixer); filtering an output of a quadrature-mixer (Q-mixer); converting an output of a first low pass filter (LPF); converting an output of a second LPF; buffering an output of a first analog-to-digital converter (ADC); buffering an output of a second ADC; buffering a transmitter signal; generating a reference signal from an output of a transmitter (TX) data capture buffer; removing DC from the reference signal; and adaptively tuning an I-mixer digital-to-analog (DAC) code and a Q-mixer DAC code from an output of a first receiver (RX) data capture buffer, an output of a second RX data capture buffer, an output of a DC removal unit, and a predetermined step size for each of the I-mixer DAC code and the Q-mixer DAC code.

公开(公告)号：US09246437B2

公开(公告)日：2016-01-26

申请号：US14702481

申请日：2015-05-01

申请人： Skyworks Solutions, Inc.

发明人： Ibrahim Engin Pehlivanoglu

IPC分类号： H04B1/44 ,  H03D7/14 ,  H03K17/687 ,  H04B1/3827

CPC分类号： H03D7/1491 ,  H03D7/1458 ,  H03D7/165 ,  H03D2200/0088 ,  H03K17/687 ,  H04B1/3833 ,  H04B1/44

摘要： A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

公开(公告)号：US09210026B2

公开(公告)日：2015-12-08

申请号：US14672267

申请日：2015-03-30

申请人： Telefonaktiebolaget L M Ericsson (Publ)

发明人： Lars Sundström ,  Fenghao Mu ,  Leif Wilhelmsson

IPC分类号： H04L27/38 ,  H04L25/08 ,  H04B1/12 ,  H03D7/16

CPC分类号： H04L27/389 ,  H03D7/166 ,  H03D2200/0088 ,  H04B1/126 ,  H04L25/08

摘要： A complex intermediate frequency mixer (IFM) for frequency translating a received complex intermediate frequency, IF, signal, wherein the received complex IF signal comprises at least two frequency bands located at upper-side and lower-side of 0 Hz, is provided. The complex intermediate frequency mixer comprises a first, second, third and fourth mixer (M1, M2, M3, M4). The complex intermediate frequency mixer further comprises a first, second, third and fourth gain adjusting component (α1, α2, δ2, δ1), connected to a first, second, third and fourth mixer output (M1-out, M2-out, M3-out, M4-out), respectively. Moreover, a first summing unit (S1), connected to a first gain output (α1-out), a fourth gain output (δ1-out) and a third mixer output (M3-out) negated, and second summing unit (S2), connected to the second gain output (α2-out), the third gain output (δ2-out) and the fourth mixer output (M4-out), are configured to output a first baseband complex signal of the received complex IF signal.

摘要翻译： 一种复合中频混频器（IFM），用于频率转换接收的复合中频IF，信号，其中所接收的复合IF信号包括位于0Hz的上侧和下侧的至少两个频带。 复合中频混频器包括第一，第二，第三和第四混频器（M1，M2，M3，M4）。 复合中频混频器还包括连接到第一，第二，第三和第四混频器输出（M1-out，M2-out，M3）的第一，第二，第三和第四增益调整分量（α1，α2，δ2，δ1） -out，M4-out）。 此外，连接到第一增益输出（α1-out），第四增益输出（δ1-out）和第三混频器输出（M3-out）的第一求和单元（S1）被否定，以及第二加法单元（S2） ，连接到第二增益输出（α2-out），第三增益输出（δ2-out）和第四混频器输出（M4-out），被配置为输出所接收的复合IF信号的第一基带复信号。

公开(公告)号：US20140155014A1

公开(公告)日：2014-06-05

申请号：US13691058

申请日：2012-11-30

申请人： QUALCOMM INCORPORATED

发明人： Lai Kan Leung ,  Gary John Ballantyne ,  Chiewcharn Narathong

IPC分类号： H04B1/16

CPC分类号： H04B1/16 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/1491 ,  H03D7/165 ,  H03D7/18 ,  H03D2200/0041 ,  H03D2200/0045 ,  H03D2200/0088

摘要： Techniques for performing analog calibration of a receiver to optimize a second-order input intercept point (IIP2). In an aspect, a signal generator modeling an interferer is coupled to an adjustable input of a receiver, e.g., a gate bias voltage of a mixer. For example, the signal generator output may be a single-tone on-off keying (OOK) modulated signal. The mixer mixes the signal down to baseband, wherein an analog correlator correlates the down-converted signal with the known sequence of bits used to perform the OOK modulation. The analog correlation output is then provided to drive the bias voltage in the mixer, e.g., one or more gate voltages of transistors in the differential mixer, to optimize the overall receiver IIP2. Further aspects of the disclosure provide for calibrating receivers having multiple LNA's, and also dual or diversity receivers having multiple receive paths.

摘要翻译： 用于执行接收机的模拟校准以优化二阶输入截距点（IIP2）的技术。 在一方面，对干扰源建模的信号发生器耦合到接收机的可调节输入端，例如混频器的栅极偏置电压。 例如，信号发生器输出可以是单音开关键控（OOK）调制信号。 混频器将信号降低到基带，其中模拟相关器将下变频信号与用于执行OOK调制的已知位的位串相关。 然后提供模拟相关输出以驱动混频器中的偏置电压，例如差分混频器中的晶体管的一个或多个栅极电压，以优化整个接收器IIP2。 本公开的另外方面提供了用于校准具有多个LNA的接收机，以及具有多个接收路径的双重或分集接收机。

公开(公告)号：US20140106685A1

公开(公告)日：2014-04-17

申请号：US14020448

申请日：2013-09-06

申请人： Skyworks Solutions, Inc.

发明人： Ibrahim Engin Pehlivanoglu

IPC分类号： H03D7/14 ,  H04B1/44

CPC分类号： H03D7/1491 ,  H03D7/1458 ,  H03D7/165 ,  H03D2200/0088 ,  H03K17/687 ,  H04B1/3833 ,  H04B1/44

摘要： A transistor-based switch is coupled to a replica circuit that includes transistor circuitry similar to that of the switch. The replica circuit biases a switched transistor to promote linear operation of the switch.

摘要翻译： 基于晶体管的开关耦合到复制电路，该复制电路包括类似于开关的晶体管电路的晶体管电路。 复制电路偏置开关晶体管以促进开关的线性操作。

公开(公告)号：US08626105B2

公开(公告)日：2014-01-07

申请号：US12561153

申请日：2009-09-16

申请人： Valérie Danelon ,  Patrice Garcia

发明人： Valérie Danelon ,  Patrice Garcia

IPC分类号： H04B1/26 ,  H04B15/00 ,  H04B1/28

CPC分类号： H03D7/1441 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/1466 ,  H03D7/1483 ,  H03D2200/0084 ,  H03D2200/0088

摘要： A mixer-amplifier of an RF signal including at least an amplifier circuit and a mixing circuit controlled at a local oscillator frequency, for amplifying a signal applied on at least one input terminal and converting a first frequency of this signal into a second, lower, frequency, and including a reverse feedback loop switched at the local oscillator frequency.

摘要翻译： 一种RF信号的混频器放大器，至少包括放大器电路和以本地振荡器频率控制的混合电路，用于放大施加在至少一个输入端上的信号，并将该信号的第一频率转换为第二， 频率，并包括以本地振荡器频率切换的反向反馈环路。

公开(公告)号：US08494475B2

公开(公告)日：2013-07-23

申请号：US13143926

申请日：2009-12-15

申请人： Laura Froment ,  Christian Poumier

发明人： Laura Froment ,  Christian Poumier

IPC分类号： H04B1/28

CPC分类号： H03D7/1441 ,  H03D7/1466 ,  H03D7/1475 ,  H03D7/1483 ,  H03D7/166 ,  H03D2200/0088

摘要： A direct mixer includes a transistor and sample-and-hold module and uses a transposition of an RF signal into baseband with a configuration with high dynamic range and low noise factor.

摘要翻译： 直接混频器包括晶体管和采样保持模块，并且使用具有高动态范围和低噪声系数的配置的RF信号到基带的转置。

公开(公告)号：US08401512B2

公开(公告)日：2013-03-19

申请号：US12756955

申请日：2010-04-08

申请人： Kenneth V. Buer

发明人： Kenneth V. Buer

IPC分类号： H04B1/26

CPC分类号： G06G7/16 ,  H03D7/1433 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1466 ,  H03D2200/0088

摘要： A MMIC (microwave monolithic integrated circuit) based FET mixer and method for the same is provided. In particular, adjacent transistors, such as FETs (field effect transistors) share terminals reducing physical layout separation and interconnections. A smaller die size is realized with the improved system geometry herein provided.

摘要翻译： 提供了一种基于MMIC（微波单片集成电路）的FET混频器及其方法。 特别地，诸如FET（场效应晶体管）的相邻晶体管共享终端，从而减少物理布局分离和互连。 使用本文提供的改进的系统几何形状实现较小的模具尺寸。

公开(公告)号：US08350745B2

公开(公告)日：2013-01-08

申请号：US12682250

申请日：2008-10-09

申请人： Wolfdietrich Georg Kasperkovitz ,  Harry Barend Schoonheijm

发明人： Wolfdietrich Georg Kasperkovitz ,  Harry Barend Schoonheijm

IPC分类号： G01S7/36

CPC分类号： H03D7/166 ,  G01S7/36 ,  H03D2200/0088 ,  H04K3/228 ,  H04K3/28 ,  H04K3/42 ,  H04K3/46

摘要： Anti jamming system comprising a tunable negative jamming signal feedback loop for feedback suppression of a received jamming signal, including an receiver receiving an jamming signal followed by a replica jamming signal generator for generating an replica jamming signal. The receiver comprising a zero IF PLL receiver having a synchronous demodulator and a phase detector, signal inputs thereof being coupled to said input means and carrier inputs coupled to in-phase and phase quadrature oscillator outputs, respectively, of a local voltage controlled oscillator (VCO), said VCO receiving a tuning control signal for tuning the zero IF PLL receiver at the carrier frequency of the jamming signal. The VCO is included in a phase locked loop (PLL) comprising subsequent to the VCO, said phase detector and a loop filter. The replica jamming signal generator includes a modulator with a baseband signal input coupled to an output of said synchronous demodulator and a carrier input coupled to the in-phase oscillator output of the VCO, an output of said modulator being negatively fedback to the input of the receiver.

摘要翻译： 一种抗干扰系统，包括可调负的干扰信号反馈回路，用于反馈抑制在诸如夏季的信号组合器的第一输入处接收的干扰信号。 信号组合器的输出通过负干扰信号反馈回路耦合到信号组合器的第二输入端。 反馈回路包括用于从信号梳理器的输出解调和选择干扰信号的正交锁相环（FLL）接收器，随后是用于产生对应于干扰信号的复制干扰信号的复制干扰信号发生器。 复制干扰信号被提供给信号组合器的第二输入，以提供信号组合装置中的干扰信号的负反馈抑制。