公开(公告)号：US20110246667A1

公开(公告)日：2011-10-06

申请号：US13074121

申请日：2011-03-29

申请人： Xiao Tao Chang ,  Rui Hou ,  Wei Liu ,  Kun Wang ,  Yu Zhang

发明人： Xiao Tao Chang ,  Rui Hou ,  Wei Liu ,  Kun Wang ,  Yu Zhang

IPC分类号： G06F15/16

CPC分类号： G06F12/0806 ,  G06F12/0879 ,  G06F15/167 ,  G06F15/7807 ,  Y02D10/12 ,  Y02D10/13

摘要： A processing unit coupled to a bus for accelerating data transmission and a method for accelerating data transmission. The present invention provides a streaming data transmission mode in which a plurality of data blocks are transmitted via one handshake. The present invention employs handshake save policy, when a processing unit sends a request comprising a plurality of data blocks on a bus, a cache or memory will perform address matching to judge whether there is any hit data block. If there is any hit data block, the cache or memory only needs to reply once and then start to continuously transmit the hit data blocks it possesses. Thus, a separate handshake for each data block is no longer needed.

摘要翻译： 耦合到总线用于加速数据传输的处理单元和加速数据传输的方法。 本发明提供一种流式数据传输模式，其中通过一个握手传送多个数据块。 本发明采用握手保存策略，当处理单元在总线上发送包括多个数据块的请求时，高速缓存或存储器将执行地址匹配以判断是否存在命中数据块。 如果有任何命中数据块，高速缓存或存储器只需要回复一次，然后开始连续发送它拥有的命中数据块。 因此，不再需要每个数据块的单独握手。

公开(公告)号：US08639840B2

公开(公告)日：2014-01-28

申请号：US13074121

申请日：2011-03-29

申请人： Xiao Tao Chang ,  Rui Hou ,  Wei Liu ,  Kun Wang ,  Yu Zhang

发明人： Xiao Tao Chang ,  Rui Hou ,  Wei Liu ,  Kun Wang ,  Yu Zhang

IPC分类号： G06F15/16 ,  G06F13/00 ,  G06F13/42

CPC分类号： G06F12/0806 ,  G06F12/0879 ,  G06F15/167 ,  G06F15/7807 ,  Y02D10/12 ,  Y02D10/13

摘要： A processing unit coupled to a bus for accelerating data transmission and a method for accelerating data transmission. The present invention provides a streaming data transmission mode in which a plurality of data blocks are transmitted via one handshake. The present invention employs handshake save policy, when a processing unit sends a request comprising a plurality of data blocks on a bus, a cache or memory will perform address matching to judge whether there is any hit data block. If there is any hit data block, the cache or memory only needs to reply once and then start to continuously transmit the hit data blocks it possesses. Thus, a separate handshake for each data block is no longer needed.

摘要翻译： 耦合到总线用于加速数据传输的处理单元和加速数据传输的方法。 本发明提供一种流式数据传输模式，其中通过一个握手传送多个数据块。 本发明采用握手保存策略，当处理单元在总线上发送包括多个数据块的请求时，高速缓存或存储器将执行地址匹配以判断是否存在命中数据块。 如果有任何命中数据块，高速缓存或存储器只需要回复一次，然后开始连续发送它拥有的命中数据块。 因此，不再需要每个数据块的单独握手。

公开(公告)号：US08447951B2

公开(公告)日：2013-05-21

申请号：US12725513

申请日：2010-03-17

申请人： Xiao Tao Chang ,  Rui Hou ,  Wei Liu ,  Kun Wang

发明人： Xiao Tao Chang ,  Rui Hou ,  Wei Liu ,  Kun Wang

IPC分类号： G06F12/00 ,  G06F12/10

CPC分类号： G06F12/1036 ,  G06F12/109

摘要： An apparatus and method for managing a translation look-aside buffer (TLB). The TLB is shared by a plurality of jobs. The method including the steps of: obtaining at least one attribute of each job of the plurality of jobs; assigning a priority level to each job according to at least one attribute of each job; and managing the related TLB entries of each job according to the priority level of each job. The present invention also provides an apparatus for managing TLB corresponding to the above method. The method and apparatus according to the present invention provide an efficient use of the shared TLB.

摘要翻译： 一种用于管理翻译后备缓冲器（TLB）的装置和方法。 TLB由多个作业共享。 该方法包括以下步骤：获得多个作业的每个作业的至少一个属性; 根据每个作业的至少一个属性为每个作业分配优先级; 并根据每个作业的优先级来管理每个作业的相关TLB条目。 本发明还提供了一种用于管理对应于上述方法的TLB的装置。 根据本发明的方法和装置提供了共享TLB的有效使用。

公开(公告)号：US20100241822A1

公开(公告)日：2010-09-23

申请号：US12725513

申请日：2010-03-17

申请人： Xiao Tao Chang ,  Rui Hou ,  Wei Liu ,  Kun Wang

发明人： Xiao Tao Chang ,  Rui Hou ,  Wei Liu ,  Kun Wang

IPC分类号： G06F12/10 ,  G06F12/00 ,  G06F9/46

CPC分类号： G06F12/1036 ,  G06F12/109

摘要： An apparatus and method for managing a translation look-aside buffer (TLB). The TLB is shared by a plurality of jobs. The method including the steps of: obtaining at least one attribute of each job of the plurality of jobs; assigning a priority level to each job according to at least one attribute of each job; and managing the related TLB entries of each job according to the priority level of each job. The present invention also provides an apparatus for managing TLB corresponding to the above method. The method and apparatus according to the present invention provide an efficient use of the shared TLB.

摘要翻译： 一种用于管理翻译后备缓冲器（TLB）的装置和方法。 TLB由多个作业共享。 该方法包括以下步骤：获得多个作业的每个作业的至少一个属性; 根据每个作业的至少一个属性为每个作业分配优先级; 并根据每个作业的优先级来管理每个作业的相关TLB条目。 本发明还提供了一种用于管理对应于上述方法的TLB的装置。 根据本发明的方法和装置提供了共享TLB的有效使用。

公开(公告)号：US08898440B2

公开(公告)日：2014-11-25

申请号：US12858588

申请日：2010-08-18

申请人： Xiao Tao Chang ,  Wei Liu ,  Kun Wang ,  Hong Bo Zeng

发明人： Xiao Tao Chang ,  Wei Liu ,  Kun Wang ,  Hong Bo Zeng

IPC分类号： G06F15/00 ,  G06F7/38 ,  G06F9/00 ,  G06F9/44 ,  G06F9/54

CPC分类号： G06F9/546 ,  G06F2209/548

摘要： A request control device, request control method, and a multiprocessor cooperation architecture. The request control device is connected to a request storage module and includes a comparing means and an identifier means. The comparing means is configured to determine if an incoming first queue unit corresponds to the same message with a queue unit that has existed in the request storage module. The identifier setting means is configured to set a save identifier of the queue unit that has existed in the request storage module to indicate not to save a state associated with the message if the first queue unit corresponds to the same message with the queue unit that has existed in the request storage module. According to the technical solution of the invention, the access to the memory caused by saving/loading the states is reduced and thereby increases the processing speed of the processor.

摘要翻译： 请求控制装置，请求控制方法以及多处理器协作架构。 请求控制装置连接到请求存储模块，并包括比较装置和识别装置。 比较装置被配置为确定进入的第一队列单元是否具有与存在于请求存储模块中的队列单元相同的消息。 所述标识符设置装置被配置为如果所述第一队列单元对应于具有所述消息的队列单元的相同消息，则将存在于所述请求存储模块中的队列单元的保存标识符设置为指示不保存与所述消息相关联的状态 存在于请求存储模块中。 根据本发明的技术方案，减少了由保存/加载状态引起的对存储器的访问，从而增加了处理器的处理速度。

公开(公告)号：US20110200040A1

公开(公告)日：2011-08-18

申请号：US13025225

申请日：2011-02-11

申请人： Xiao Tao Chang ,  Wei Liu ,  Kun Wang ,  Hong Bo Zeng

发明人： Xiao Tao Chang ,  Wei Liu ,  Kun Wang ,  Hong Bo Zeng

IPC分类号： H04L12/56

CPC分类号： H04L45/00 ,  H04L45/12

摘要： An embodiment of the invention provides an extremum route determining engine and method. The engine includes a memory for storing a path with a weight in a graph and an extremum route determining logic circuit. The logic circuit includes a path reading section for reading the path in the graph, a writing section for updating the weight of the read path according to a predetermined extremum requirement and writing the path whose weight is updated into the memory, and an extremum route determining section for determining an extremum route. The method includes reading a stored path in a graph, the path having a weight, updating the weight of the read path and writing the path whose weight has been updated into a memory, and determining an extremum route. An embodiment of the invention improves the processing speed of extremum route determination.

摘要翻译： 本发明的实施例提供了一种极值路线确定引擎和方法。 引擎包括用于存储具有图中的权重的路径的存储器和极值路由确定逻辑电路。 逻辑电路包括用于读取图中的路径的路径读取部分，用于根据预定的极值要求更新读取路径的权重并将其更新的路径写入存储器的写入部分，以及极限路径确定 确定极值路线的部分。 该方法包括读取图中存储的路径，路径具有加权，更新读路径的权重并且将权重已被更新的路径写入存储器，以及确定极值路由。 本发明的实施例提高了极值路线确定的处理速度。

公开(公告)号：US20110055522A1

公开(公告)日：2011-03-03

申请号：US12858588

申请日：2010-08-18

申请人： Xiao Tao Chang ,  Wei Liu ,  Kun Wang ,  Hong Bo Zeng

发明人： Xiao Tao Chang ,  Wei Liu ,  Kun Wang ,  Hong Bo Zeng

IPC分类号： G06F9/30 ,  G06F9/44

CPC分类号： G06F9/546 ,  G06F2209/548

摘要： A request control device, request control method, and a multiprocessor cooperation architecture. The request control device is connected to a request storage module and includes a comparing means and an identifier means. The comparing means is configured to determine if an incoming first queue unit corresponds to the same message with a queue unit that has existed in the request storage module. The identifier setting means is configured to set a save identifier of the queue unit that has existed in the request storage module to indicate not to save a state associated with the message if the first queue unit corresponds to the same message with the queue unit that has existed in the request storage module. According to the technical solution of the invention, the access to the memory caused by saving/loading the states is reduced and thereby increases the processing speed of the processor.

摘要翻译： 请求控制装置，请求控制方法以及多处理器协作架构。 请求控制装置连接到请求存储模块，并包括比较装置和识别装置。 比较装置被配置为确定进入的第一队列单元是否具有与存在于请求存储模块中的队列单元相同的消息。 所述标识符设置装置被配置为如果所述第一队列单元对应于具有所述消息的队列单元的相同消息，则将存在于所述请求存储模块中的队列单元的保存标识符设置为指示不保存与所述消息相关联的状态 存在于请求存储模块中。 根据本发明的技术方案，减少了由保存/加载状态引起的对存储器的访问，从而增加了处理器的处理速度。

公开(公告)号：US20100161875A1

公开(公告)日：2010-06-24

申请号：US12633299

申请日：2009-12-08

申请人： Xiao Tao Chang ,  Huayong Wang ,  Kun Wang ,  Yu Zhang

发明人： Xiao Tao Chang ,  Huayong Wang ,  Kun Wang ,  Yu Zhang

IPC分类号： G06F12/10 ,  G06F9/455 ,  G06F12/00

CPC分类号： G06F12/1036 ,  G06F9/4552 ,  G06F9/45554 ,  G06F9/45558 ,  G06F2009/45583

摘要： A Simulator and a simulating method for running a guest program in a host are disclosed. The simulator includes: an initialization device configured for setting content of a hypervisor page table in the host, the hypervisor page table mapping a guest physical address space to a host physical address space. The simulator further includes a binary translation device configured for employing a program logical address to perform a memory access in code translation. The simulator also includes a miss handling device configured for updating a guest translation look-aside buffer by treating a miss in a host translation look-aside buffer caused by the execution of the translated code as a miss in the guest translation look-aside buffer, wherein the host translation look-aside buffer is configured to buffer entries for mapping addresses in a guest program logical address space to addresses in the guest physical address space. The simulator further includes an update tracing device configured for, in response to the update to the guest translation look-aside buffer, perform the update to the host translation look-aside buffer. Also disclosed is a method for running a guest program in a host.

摘要翻译： 公开了一种用于在主机中运行访客程序的模拟器和模拟方法。 模拟器包括：配置用于设置主机中的管理程序页表的内容的初始化设备，将客户物理地址空间映射到主机物理地址空间的管理程序页表。 仿真器还包括被配置为使用程序逻辑地址来执行代码转换中的存储器访问的二进制翻译装置。 所述模拟器还包括未命中处理装置，其被配置为通过处理由所述翻译代码的执行而导致的主机翻译后备缓冲器中的未命中来更新客体翻译后备缓冲器，作为所述访客翻译后备缓冲器中的未命中， 其中所述主机翻译后备缓冲器被配置为缓冲条目以将访客程序逻辑地址空间中的地址映射到所述访客物理地址空间中的地址。 所述模拟器还包括更新跟踪装置，所述更新跟踪装置被配置为响应于所述客户端翻译后备缓冲器的更新，执行对所述主机翻译后备缓冲器的更新。 还公开了一种在主机中运行客座程序的方法。

公开(公告)号：US08397050B2

公开(公告)日：2013-03-12

申请号：US12633299

申请日：2009-12-08

申请人： Xiao Tao Chang ,  Huayong Wang ,  Kun Wang ,  Yu Zhang

发明人： Xiao Tao Chang ,  Huayong Wang ,  Kun Wang ,  Yu Zhang

IPC分类号： G06F12/10

CPC分类号： G06F12/1036 ,  G06F9/4552 ,  G06F9/45554 ,  G06F9/45558 ,  G06F2009/45583

摘要： A Simulator and a simulating method for running a guest program in a host are disclosed. The simulator includes: an initialization device configured for setting content of a hypervisor page table in the host, the hypervisor page table mapping a guest physical address space to a host physical address space. The simulator further includes a binary translation device configured for employing a program logical address to perform a memory access in code translation. The simulator also includes a miss handling device configured for updating a guest translation look-aside buffer by treating a miss in a host translation look-aside buffer caused by the execution of the translated code as a miss in the guest translation look-aside buffer, wherein the host translation look-aside buffer is configured to buffer entries for mapping addresses in a guest program logical address space to addresses in the guest physical address space. The simulator further includes an update tracing device configured for, in response to the update to the guest translation look-aside buffer, perform the update to the host translation look-aside buffer. Also disclosed is a method for running a guest program in a host.

摘要翻译： 公开了一种用于在主机中运行访客程序的模拟器和模拟方法。 模拟器包括：配置用于设置主机中的管理程序页表的内容的初始化设备，将客户物理地址空间映射到主机物理地址空间的管理程序页表。 仿真器还包括被配置为使用程序逻辑地址来执行代码转换中的存储器访问的二进制翻译装置。 所述模拟器还包括未命中处理装置，其被配置为通过处理由所述翻译代码的执行而导致的主机翻译后备缓冲器中的未命中来更新客体翻译后备缓冲器，作为所述访客翻译后备缓冲器中的未命中， 其中所述主机翻译后备缓冲器被配置为缓冲条目以将访客程序逻辑地址空间中的地址映射到所述访客物理地址空间中的地址。 所述模拟器还包括更新跟踪装置，所述更新跟踪装置被配置为响应于所述客户端翻译后备缓冲器的更新，执行对所述主机翻译后备缓冲器的更新。 还公开了一种在主机中运行客座程序的方法。

公开(公告)号：US09086980B2

公开(公告)日：2015-07-21

申请号：US13564350

申请日：2012-08-01

申请人： Yi Ge ,  Rui Hou ,  Kun Wang ,  Hong Bo Zeng ,  Yu Zhang

发明人： Yi Ge ,  Rui Hou ,  Kun Wang ,  Hong Bo Zeng ,  Yu Zhang

IPC分类号： G06F12/08

CPC分类号： G06F12/0895 ,  Y02D10/13

摘要： The present disclosure provides a method, device, and system for processing a request in a multi-core system. The method comprises steps of: receiving a request for data by a filter from a requesting unit; comparing an indicator indicative of a logical partition in the request with an indicator indicative of the logical partition in a record of the filter; searching in a unit where the filter is located based on the request and returning a search result to the requesting unit if a comparison result matches; and returning a NONE response to the requesting unit from the filter if the comparison result does not match.

摘要翻译： 本公开提供了一种用于在多核系统中处理请求的方法，设备和系统。 该方法包括以下步骤：通过过滤器从请求单元接收对数据的请求; 将指示所述请求中的逻辑分区的指示符与指示所述过滤器的记录中的所述逻辑分区的指示符进行比较; 如果比较结果匹配，则根据请求在过滤器所在单元中进行搜索，并将搜索结果返回给请求单元; 并且如果比较结果不匹配，则从过滤器返回NONE响应到请求单元。