公开(公告)号：US20200293635A1

公开(公告)日：2020-09-17

申请号：US16299575

申请日：2019-03-12

Applicant: Xilinx, Inc.

Inventor： Brian S. Martin ,  Premduth Vidyanandan ,  Mark B. Carson ,  Neil Watson ,  Gary J. McClintock

IPC: G06F21/12 ,  G06F21/57 ,  H04L9/32 ,  H04L9/30 ,  G06F9/50

Abstract: An example hardware accelerator for a computer system includes a programmable device and further includes kernel logic configured in a programmable fabric of the programmable device, and an intellectual property (IP) checker circuit in the kernel logic. The IP checker circuit is configured to obtain a device identifier (ID) of the programmable device and a signed whitelist, the signed whitelist including a list of device IDs and a signature, verify the signature of the signed whitelist, compare the device ID against the list of device IDs, and selectively assert or deassert an enable of the kernel logic in response to presence or absence, respectively, of the device ID in the list of device IDs and verification of the signature.

公开(公告)号：US20200293636A1

公开(公告)日：2020-09-17

申请号：US16299611

申请日：2019-03-12

Applicant: Xilinx, Inc.

Inventor： Brian S. Martin ,  Premduth Vidyanandan ,  Mark B. Carson ,  Neil Watson ,  Gary J. McClintock

IPC: G06F21/12 ,  G06F21/57 ,  H04L9/32 ,  H04L9/30 ,  G06F9/50

Abstract: An example hardware accelerator for a computer system includes a programmable device and further includes kernel logic configured in a first programmable fabric of the programmable device, a shell circuit configured in a second programmable fabric of the programmable device, the shell circuit configured to provide an interface between a computer system and the kernel logic, and an intellectual property (IP) checker circuit in the kernel logic The IP checker circuit is configured to obtain a device identifier (ID) from the first programmable fabric and a signed whitelist, the signed whitelist including a list of device IDs and a signature, verify the signature of the signed whitelist, compare the device ID against the list of device IDs, and selectively assert or deassert an enable of the kernel logic in response to presence or absence, respectively, of the device ID in the list of device IDs and verification of the signature.

公开(公告)号：US11294992B2

公开(公告)日：2022-04-05

申请号：US16299611

申请日：2019-03-12

Applicant: Xilinx, Inc.

Inventor： Brian S. Martin ,  Premduth Vidyanandan ,  Mark B. Carson ,  Neil Watson ,  Gary J. McClintock

IPC: G06F21/12 ,  G06F21/57 ,  H04L9/32 ,  G06F9/50 ,  H04L9/30

Abstract: An example hardware accelerator for a computer system includes a programmable device and further includes kernel logic configured in a first programmable fabric of the programmable device, a shell circuit configured in a second programmable fabric of the programmable device, the shell circuit configured to provide an interface between a computer system and the kernel logic, and an intellectual property (IP) checker circuit in the kernel logic The IP checker circuit is configured to obtain a device identifier (ID) from the first programmable fabric and a signed whitelist, the signed whitelist including a list of device IDs and a signature, verify the signature of the signed whitelist, compare the device ID against the list of device IDs, and selectively assert or deassert an enable of the kernel logic in response to presence or absence, respectively, of the device ID in the list of device IDs and verification of the signature.

公开(公告)号：US11232219B1

公开(公告)日：2022-01-25

申请号：US16264101

申请日：2019-01-31

Applicant: Xilinx, Inc.

Inventor： Bin Ochotta ,  Alec J. Wong ,  Nghia Do ,  Dennis McCrohan ,  David A. Knol ,  Premduth Vidyanandan ,  Satyam Jani

IPC: G06F21/62 ,  H04L9/08 ,  G06F21/10 ,  G06F21/76 ,  H04L9/32 ,  G06F21/60 ,  H04L9/14 ,  G06F21/64 ,  G06F21/12

Abstract: Removing protections on a session-key protected design include receiving a double encrypted vendor private key and an encrypted session key. The double encrypted vendor private key is decrypted into a single encrypted vendor-private key using a user private key, and the single encrypted vendor-private key is decrypted into a vendor private key using a vendor pass phrase. The encrypted session key is decrypted into a session key using the vendor private key, and the session-key protected design is decrypted into a plain design using the session key.

公开(公告)号：US11443018B2

公开(公告)日：2022-09-13

申请号：US16299575

申请日：2019-03-12

Applicant: Xilinx, Inc.

Inventor： Brian S. Martin ,  Premduth Vidyanandan ,  Mark B. Carson ,  Neil Watson ,  Gary J. McClintock

IPC: G06F21/12 ,  G06F21/57 ,  H04L9/32 ,  G06F9/50 ,  H04L9/30

Abstract: An example hardware accelerator for a computer system includes a programmable device and further includes kernel logic configured in a programmable fabric of the programmable device, and an intellectual property (IP) checker circuit in the kernel logic. The IP checker circuit is configured to obtain a device identifier (ID) of the programmable device and a signed whitelist, the signed whitelist including a list of device IDs and a signature, verify the signature of the signed whitelist, compare the device ID against the list of device IDs, and selectively assert or deassert an enable of the kernel logic in response to presence or absence, respectively, of the device ID in the list of device IDs and verification of the signature.