公开(公告)号：US11196418B1

公开(公告)日：2021-12-07

申请号：US16842610

申请日：2020-04-07

Applicant: Xilinx, Inc.

Inventor： Samudyatha Suryanarayana ,  Vinit Shah ,  David S. Smith ,  Andrew Tabalujan ,  Arvind R. Bomdica

IPC: H03K19/00 ,  G11C11/4093 ,  H04L25/02

Abstract: Apparatus and associated methods relate to an I/O bank impedance calibration circuit having (a) a replica master resistor coupled to an external precision resistor, and (b) a control circuit configured to calibrate an output impedance of the master resistor to generate a calibrated code to control a replica slave resistor in each bank. In an illustrative example, a signal applied to the replica master resistor may be compared against a programmable reference signal. The control circuit may generate the calibrated code, in response to the comparison result, to calibrate the output impedance of the replica master resistor. By implementing the replica master resistor and the replica slave resistor, impedances of a large number of IOs or banks may be calibrated by the impedance calibration circuit using a single one reference pin.