公开(公告)号：US11003826B1

公开(公告)日：2021-05-11

申请号：US16397501

申请日：2019-04-29

Applicant: Xilinx, Inc.

Inventor： Srinivasan Dasasathyan ,  Padmini Gopalakrishnan ,  Vishal Tripathy ,  Vikas N. Vedamurthy ,  Sumit Nagpal

IPC: G06F30/392 ,  G06F30/327 ,  G06F111/04

Abstract: Strategies are stored in a memory arrangement, and each strategy includes a set of parameter settings for a design tool. The design tool identifies a set of features of an input circuit design and applies classification models to the input circuit design. Each classification model indicates one the strategies, and application of each classification model indicates a likelihood that use of the strategy would improve a metric of the input circuit design based on the set of features of the input circuit design. One strategy of the plurality of strategies is selected based on the likelihood that use of the one strategy would improve the metric of the input circuit design, and the design tool is configured with the set of parameter settings of the one strategy. The design tool then processes the input circuit design into implementation data that is suitable for making an integrated circuit (IC).