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1.发明授权公开(公告)号：US08110881B2
公开(公告)日：2012-02-07
申请号：US11863130
申请日：2007-09-27
申请人： Ya-Chen Kao , Chun-Jung Lin , Yu-Jen Wang , Hsu-Chen Cheng , Feng-Jia Shiu , Yung-Tao Lin
发明人： Ya-Chen Kao , Chun-Jung Lin , Yu-Jen Wang , Hsu-Chen Cheng , Feng-Jia Shiu , Yung-Tao Lin
IPC分类号： H01L29/82
摘要： A MRAM cell structure includes a bottom electrode; a magnetic tunnel junction unit disposed on the bottom electrode; a top electrode disposed on the magnetic tunnel junction unit; and a blocking layer disposed on the top electrode, wherein the blocking layer is wider than the magnetic tunnel junction unit for preventing against formation of a short circuit between a contact and the magnetic tunnel junction unit.
摘要翻译： MRAM单元结构包括底电极; 设置在所述底部电极上的磁性隧道结单元; 设置在磁隧道结单元上的顶电极; 以及设置在所述顶部电极上的阻挡层，其中所述阻挡层比所述磁性隧道结单元宽，以防止在触点和所述磁性隧道结单元之间形成短路。
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2.发明申请公开(公告)号：US20090085132A1
公开(公告)日：2009-04-02
申请号：US11863130
申请日：2007-09-27
申请人： Ya Chen Kao , Chun-Jung Lin , Yu-Jen Wang , Hsu-Chen Cheng , Feng-Jia Shiu , Yung-Tao Lin
发明人： Ya Chen Kao , Chun-Jung Lin , Yu-Jen Wang , Hsu-Chen Cheng , Feng-Jia Shiu , Yung-Tao Lin
IPC分类号： H01L29/82
摘要： A MRAM cell structure includes a bottom electrode; a magnetic tunnel junction unit disposed on the bottom electrode; a top electrode disposed on the magnetic tunnel junction unit; and a blocking layer disposed on the top electrode, wherein the blocking layer is wider than the magnetic tunnel junction unit for preventing against formation of a short circuit between a contact and the magnetic tunnel junction unit.
摘要翻译： MRAM单元结构包括底电极; 设置在所述底部电极上的磁性隧道结单元; 设置在磁隧道结单元上的顶电极; 以及设置在所述顶部电极上的阻挡层，其中所述阻挡层比所述磁性隧道结单元宽，以防止在触点和所述磁性隧道结单元之间形成短路。
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公开(公告)号：US07573736B2
公开(公告)日：2009-08-11
申请号：US11752157
申请日：2007-05-22
申请人： Yu-Jen Wang , Denny Tang , Hsu-Chen Cheng
发明人： Yu-Jen Wang , Denny Tang , Hsu-Chen Cheng
IPC分类号： G11C11/00
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1675
摘要： The present disclosure provides a magnetic memory element. The memory element includes a magnetic tunnel junction (MTJ) element and an electrode. The electrode includes a pinning layer, a pinned layer, and a non-magnetic conductive layer. In one embodiment, the MTJ element includes a first surface having a first surface area, and the electrode includes a second surface. In the embodiment, the second surface of the electrode is coupled to the first surface of the MTJ element such that an interface area is formed and the interface area is less than the first surface area.
摘要翻译： 本公开提供了一种磁存储元件。 存储元件包括磁隧道结（MTJ）元件和电极。 电极包括钉扎层，钉扎层和非磁性导电层。 在一个实施例中，MTJ元件包括具有第一表面区域的第一表面，并且电极包括第二表面。 在该实施例中，电极的第二表面耦合到MTJ元件的第一表面，使得形成界面区域，并且界面面积小于第一表面积。
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公开(公告)号：US07719882B2
公开(公告)日：2010-05-18
申请号：US11743453
申请日：2007-05-02
申请人： Wen-Chin Lin , Hsu-Chen Cheng , Yu-Jen Wang , Denny Tang
发明人： Wen-Chin Lin , Hsu-Chen Cheng , Yu-Jen Wang , Denny Tang
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C11/005 , H01L2924/0002 , H01L2924/00
摘要： Disclosed herein is a technique for created an advanced MRAM array for constructing a memory integrated circuit chip. More specifically, the disclosed principles provide for an integrated circuit memory chip comprised of a combination of at least one of an array of high-speed magnetic memory cells, and at least one of an array of high-density magnetic memory cells. Accordingly, a memory chip constructed as disclosed herein provides the benefit of both high-speed and high-density memory cells on the same memory chip. As a result, applications benefiting from the use of (or perhaps even needing) high-speed memory cells are provided by the memory cells in the high-speed memory cell array.
摘要翻译： 这里公开了一种用于创建用于构建存储器集成电路芯片的高级MRAM阵列的技术。 更具体地，所公开的原理提供了由高速磁存储器单元的阵列中的至少一个和高密度磁存储单元的阵列中的至少一个的组合构成的集成电路存储器芯片。 因此，如本文所公开的构造的存储器芯片提供了在相同存储器芯片上的高速和高密度存储器单元的益处。 结果，受益于使用（或甚至需要的）高速存储器单元的应用由高速存储单元阵列中的存储单元提供。
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公开(公告)号：US20100118603A1
公开(公告)日：2010-05-13
申请号：US12687608
申请日：2010-01-14
申请人： Yu-Jen Wang , Hsu-Chen Cheng , Denny Tang
发明人： Yu-Jen Wang , Hsu-Chen Cheng , Denny Tang
CPC分类号： G11C11/1693 , G11C11/161 , G11C11/1659 , G11C11/1675
摘要： The present disclosure provides a non-volatile memory device. A memory device includes a first magnetic element having a fixed magnetization. The memory device also includes a second magnetic element having a non-fixed magnetization. The memory device further includes a barrier layer between the first and second magnetic elements. A unidirectional current source is electrically coupled to the first and second magnetic elements. The current source is configured to provide a first current to the first and second memory elements. The first current has a first current density and is in a first direction. The current source is also configured to provide a second current to the first and second magnetic elements. The second current has a second current density, different than the first current density, and is in the first direction. The first and second currents cause the non-fixed magnetization of the second magnetic element to toggle between substantially parallel to the fixed magnetization of the first magnetic element and between substantially antiparallel to the fixed magnetization of the first magnetic element.
摘要翻译： 本公开提供了一种非易失性存储器件。 存储器件包括具有固定磁化强度的第一磁性元件。 存储器件还包括具有非固定磁化强度的第二磁性元件。 存储器件还包括在第一和第二磁性元件之间的阻挡层。 单向电流源电耦合到第一和第二磁性元件。 当前源被配置为向第一和第二存储器元件提供第一电流。 第一电流具有第一电流密度并且处于第一方向。 电流源还被配置为向第一和第二磁性元件提供第二电流。 第二电流具有与第一电流密度不同的第二电流密度，并且处于第一方向。 第一和第二电流导致第二磁性元件的非固定磁化在基本上平行于第一磁性元件的固定磁化之间以及基本上反平行于第一磁性元件的固定磁化之间翻转。
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公开(公告)号：US08213220B2
公开(公告)日：2012-07-03
申请号：US12687608
申请日：2010-01-14
申请人： Yu-Jen Wang , Hsu-Chen Cheng , Denny Tang
发明人： Yu-Jen Wang , Hsu-Chen Cheng , Denny Tang
IPC分类号： G11C11/00
CPC分类号： G11C11/1693 , G11C11/161 , G11C11/1659 , G11C11/1675
摘要： The present disclosure provides a non-volatile memory device. A memory device includes a first magnetic element having a fixed magnetization. The memory device also includes a second magnetic element having a non-fixed magnetization. The memory device further includes a barrier layer between the first and second magnetic elements. A unidirectional current source is electrically coupled to the first and second magnetic elements. The current source is configured to provide a first current to the first and second memory elements. The first current has a first current density and is in a first direction. The current source is also configured to provide a second current to the first and second magnetic elements. The second current has a second current density, different than the first current density, and is in the first direction. The first and second currents cause the non-fixed magnetization of the second magnetic element to toggle between substantially parallel to the fixed magnetization of the first magnetic element and between substantially antiparallel to the fixed magnetization of the first magnetic element.
摘要翻译： 本公开提供了一种非易失性存储器件。 存储器件包括具有固定磁化强度的第一磁性元件。 存储器件还包括具有非固定磁化强度的第二磁性元件。 存储器件还包括在第一和第二磁性元件之间的阻挡层。 单向电流源电耦合到第一和第二磁性元件。 当前源被配置为向第一和第二存储器元件提供第一电流。 第一电流具有第一电流密度并且处于第一方向。 电流源还被配置为向第一和第二磁性元件提供第二电流。 第二电流具有与第一电流密度不同的第二电流密度，并且处于第一方向。 第一和第二电流导致第二磁性元件的非固定磁化在基本上平行于第一磁性元件的固定磁化之间以及基本上反平行于第一磁性元件的固定磁化之间翻转。
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公开(公告)号：US08120947B2
公开(公告)日：2012-02-21
申请号：US12537093
申请日：2009-08-06
申请人： Yu-Jen Wang , Denny Tang , Hsu-Chen Cheng
发明人： Yu-Jen Wang , Denny Tang , Hsu-Chen Cheng
IPC分类号： G11C11/00
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1675
摘要： The present disclosure provides a magnetic memory element. The memory element includes a magnetic tunnel junction (MTJ) element and an electrode. The electrode includes a pinning layer, a pinned layer, and a non-magnetic conductive layer. In one embodiment, the MTJ element includes a first surface having a first surface area, and the electrode includes a second surface. In the embodiment, the second surface of the electrode is coupled to the first surface of the MTJ element such that an interface area is formed and the interface area is less than the first surface area.
摘要翻译： 本公开提供了一种磁存储元件。 存储元件包括磁隧道结（MTJ）元件和电极。 电极包括钉扎层，钉扎层和非磁性导电层。 在一个实施例中，MTJ元件包括具有第一表面区域的第一表面，并且电极包括第二表面。 在该实施例中，电极的第二表面耦合到MTJ元件的第一表面，使得形成界面区域，并且界面面积小于第一表面积。
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公开(公告)号：US20090290410A1
公开(公告)日：2009-11-26
申请号：US12537093
申请日：2009-08-06
申请人： Yu-Jen Wang , Denny Tang , Hsu-Chen Cheng
发明人： Yu-Jen Wang , Denny Tang , Hsu-Chen Cheng
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1675
摘要： The present disclosure provides a magnetic memory element. The memory element includes a magnetic tunnel junction (MTJ) element and an electrode. The electrode includes a pinning layer, a pinned layer, and a non-magnetic conductive layer. In one embodiment, the MTJ element includes a first surface having a first surface area, and the electrode includes a second surface. In the embodiment, the second surface of the electrode is coupled to the first surface of the MTJ element such that an interface area is formed and the interface area is less than the first surface area.
摘要翻译： 本公开提供了一种磁存储元件。 存储元件包括磁隧道结（MTJ）元件和电极。 电极包括钉扎层，钉扎层和非磁性导电层。 在一个实施例中，MTJ元件包括具有第一表面区域的第一表面，并且电极包括第二表面。 在该实施例中，电极的第二表面耦合到MTJ元件的第一表面，使得形成界面区域，并且界面面积小于第一表面积。
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公开(公告)号：US20080291720A1
公开(公告)日：2008-11-27
申请号：US11752157
申请日：2007-05-22
申请人： Yu-Jen Wang , Denny Tang , Hsu-Chen Cheng
发明人： Yu-Jen Wang , Denny Tang , Hsu-Chen Cheng
CPC分类号： H01L43/08 , G11C11/161 , G11C11/1675
摘要： The present disclosure provides a magnetic memory element. The memory element includes a magnetic tunnel junction (MTJ) element and an electrode. The electrode includes a pinning layer, a pinned layer, and a non-magnetic conductive layer. In one embodiment, the MTJ element includes a first surface having a first surface area, and the electrode includes a second surface. In the embodiment, the second surface of the electrode is coupled to the first surface of the MTJ element such that an interface area is formed and the interface area is less than the first surface area.
摘要翻译： 本公开提供了一种磁存储元件。 存储元件包括磁隧道结（MTJ）元件和电极。 电极包括钉扎层，钉扎层和非磁性导电层。 在一个实施例中，MTJ元件包括具有第一表面区域的第一表面，并且电极包括第二表面。 在该实施例中，电极的第二表面耦合到MTJ元件的第一表面，使得形成界面区域，并且界面面积小于第一表面区域。
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公开(公告)号：US20080186757A1
公开(公告)日：2008-08-07
申请号：US11743453
申请日：2007-05-02
申请人： Wen-Chin Lin , Hsu-Chen Cheng , Yu-Jen Wang , Denny Tang
发明人： Wen-Chin Lin , Hsu-Chen Cheng , Yu-Jen Wang , Denny Tang
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C11/005 , H01L2924/0002 , H01L2924/00
摘要： Disclosed herein is a technique for created an advanced MRAM array for constructing a memory integrated circuit chip. More specifically, the disclosed principles provide for an integrated circuit memory chip comprised of a combination of at least one of an array of high-speed magnetic memory cells, and at least one of an array of high-density magnetic memory cells. Accordingly, a memory chip constructed as disclosed herein provides the benefit of both high-speed and high-density memory cells on the same memory chip. As a result, applications benefiting from the use of (or perhaps even needing) high-speed memory cells are provided by the memory cells in the high-speed memory cell array.
摘要翻译： 这里公开了一种用于创建用于构建存储器集成电路芯片的高级MRAM阵列的技术。 更具体地，所公开的原理提供了由高速磁存储器单元的阵列中的至少一个和高密度磁存储单元阵列中的至少一个的组合构成的集成电路存储器芯片。 因此，如本文所公开的构造的存储器芯片提供了在相同存储器芯片上的高速和高密度存储器单元的益处。 结果，受益于使用（或甚至需要的）高速存储器单元的应用由高速存储单元阵列中的存储单元提供。
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