公开(公告)号：US11967393B2

公开(公告)日：2024-04-23

申请号：US17472542

申请日：2021-09-10

申请人： Yangtze Memory Technologies Co., Ltd.

发明人： Jian Luo ,  Zhuqin Duan

IPC分类号： G11C5/14 ,  G06F1/06 ,  G11C11/40

CPC分类号： G11C5/148 ,  G06F1/06 ,  G11C11/40

摘要： A semiconductor device includes a clock gating circuit and a control circuit. The clock gating circuit outputs a gated clock signal based on a clock signal. Transitions of the clock signal are output in the gated clock signal in response to a clock enable signal having an enable value and are disabled from being output in the gated clock signal in response to the clock enable signal having a disable value. The control circuit includes a first portion that operates based on the clock signal. The first portion sets the clock enable signal to the disable value in response to a disable control and sets the clock enable signal to the enable value in response to a wakeup control. The control circuit includes a second portion that operates based on the gated clock signal. The second portion provides the disable control to the first portion during an operation.