公开(公告)号：US20120030543A1

公开(公告)日：2012-02-02

申请号：US13180713

申请日：2011-07-12

申请人： Yi Ge ,  Rui Hou ,  Li Li ,  Liang Liu

发明人： Yi Ge ,  Rui Hou ,  Li Li ,  Liang Liu

IPC分类号： G06F11/10

CPC分类号： G06F11/1004

摘要： A method, a memory controller and a processor architecture for protecting an application in a memory are disclosed. The application is cached as memory lines according to a size of a cache line. For example, the method comprises: in response to a load access request from a processor, reading from the memory a flagged memory line and an ECC checksum corresponding to the memory line, wherein the flagged memory line is obtained by performing a logic operation on a predetermined bit of the memory line and a flag bit for identifying the memory line; performing an ECC check on the flagged memory line by using the ECC checksum to obtain a value of the flag bit of the memory line; restoring the flagged memory line to the memory line according to the value of the flag bit; and determining whether or not to load the memory line according to the value of the flag bit and the type of the load access request from the processor.

摘要翻译： 公开了一种用于保护存储器中的应用的方法，存储器控制器和处理器架构。 应用程序根据高速缓存行的大小来缓存为内存行。 例如，该方法包括：响应于来自处理器的负载访问请求，从存储器读取标记的存储器线和对应于存储器线的ECC校验和，其中通过对标记的存储器线执行逻辑运算来获得标记的存储器线 存储器线的预定位和用于识别存储器线的标志位; 通过使用ECC校验和对所标记的存储器线执行ECC检查以获得存储器线的标志位的值; 根据标志位的值将标记的存储器线恢复到存储器线; 以及根据所述标志位的值和来自所述处理器的所述负载访问请求的类型来确定是否加载所述存储器线。

公开(公告)号：US20090178054A1

公开(公告)日：2009-07-09

申请号：US12348933

申请日：2009-01-06

申请人： Ying Chen ,  Yi Ge ,  Rui Hou ,  Liang Liu ,  Xiao Zhong

发明人： Ying Chen ,  Yi Ge ,  Rui Hou ,  Liang Liu ,  Xiao Zhong

IPC分类号： G06F9/46

CPC分类号： G06F9/4881 ,  G06F2209/484

摘要： A method and an apparatus for concomitance scheduling a work thread and assistant threads associated with the work thread in a multi-threading processor system. The method includes: searching one or more assistant threads associated with the running of the work thread when preparing to run/schedule the work thread; running the one or more assistant threads that are searched; and running the work thread after all of the one or more assistant threads associated with the running of the work thread have run.

摘要翻译： 一种用于在多线程处理器系统中调度工作线程和与工作线程相关联的辅助线程的方法和装置。 该方法包括：在准备运行/调度工作线程时，搜索与工作线程的运行相关联的一个或多个辅助线程; 运行所搜索的一个或多个辅助线程; 并且在运行与工作线程的运行相关联的所有一个或多个辅助线程之后运行工作线程。

公开(公告)号：US08578377B2

公开(公告)日：2013-11-05

申请号：US13165926

申请日：2011-06-22

申请人： Yi Ge ,  Rui Hou ,  Wu Yu Hui ,  Liang Liu ,  Wei Liu

发明人： Yi Ge ,  Rui Hou ,  Wu Yu Hui ,  Liang Liu ,  Wei Liu

IPC分类号： G06F9/455

CPC分类号： G06F9/45558 ,  G06F9/4856 ,  G06F9/5077 ,  G06F2009/4557

摘要： A computer-implemented method, an accelerator hardware unit, and an article of manufacture for supporting virtual machine migration. The method includes: acquiring a task request from a task queue of an accelerator hardware unit; extracting identification information of a related virtual machine from the task request; determining whether the identification information of the related virtual machine matches the identification information of a virtual machine to be migrated, where the identification information of a virtual machine to be migrated is recorded in a virtual machine identification information table; and deleting the task request from the task queue if the extracted identification information matches the identification information of a virtual machine to be migrated.

摘要翻译： 一种计算机实现的方法，加速器硬件单元和用于支持虚拟机迁移的制品。 该方法包括：从加速器硬件单元的任务队列获取任务请求; 从所述任务请求提取相关虚拟机的识别信息; 确定所述相关虚拟机的识别信息是否与要迁移的虚拟机的识别信息相匹配，其中要迁移的虚拟机的识别信息被记录在虚拟机识别信息表中; 以及如果所提取的标识信息与要迁移的虚拟机的标识信息匹配，则从任务队列中删除任务请求。

公开(公告)号：US08490098B2

公开(公告)日：2013-07-16

申请号：US12348933

申请日：2009-01-06

申请人： Ying Chen ,  Yi Ge ,  Rui Hou ,  Liang Liu ,  Xiao Zhong

发明人： Ying Chen ,  Yi Ge ,  Rui Hou ,  Liang Liu ,  Xiao Zhong

IPC分类号： G06F9/46

CPC分类号： G06F9/4881 ,  G06F2209/484

摘要： A method and an apparatus for concomitance scheduling a work thread and assistant threads associated with the work thread in a multi-threading processor system. The method includes: searching one or more assistant threads associated with the running of the work thread when preparing to run/schedule the work thread; running the one or more assistant threads that are searched; and running the work thread after all of the one or more assistant threads associated with the running of the work thread have run.

摘要翻译： 一种用于在多线程处理器系统中调度工作线程和与工作线程相关联的辅助线程的方法和装置。 该方法包括：在准备运行/调度工作线程时，搜索与工作线程的运行相关联的一个或多个辅助线程; 运行所搜索的一个或多个辅助线程; 并且在运行与工作线程的运行相关联的所有一个或多个辅助线程之后运行工作线程。

公开(公告)号：US20120005678A1

公开(公告)日：2012-01-05

申请号：US13165926

申请日：2011-06-22

申请人： Yi Ge ,  Rui Hou ,  Wu Yu Hui ,  Liang Liu ,  Wei Liu

发明人： Yi Ge ,  Rui Hou ,  Wu Yu Hui ,  Liang Liu ,  Wei Liu

IPC分类号： G06F9/455

CPC分类号： G06F9/45558 ,  G06F9/4856 ,  G06F9/5077 ,  G06F2009/4557

摘要： A computer-implemented method, an accelerator hardware unit, and an article of manufacture for supporting virtual machine migration. The method includes: acquiring a task request from a task queue of an accelerator hardware unit; extracting identification information of a related virtual machine from the task request; determining whether the identification information of the related virtual machine matches the identification information of a virtual machine to be migrated, where the identification information of a virtual machine to be migrated is recorded in a virtual machine identification information table; and deleting the task request from the task queue if the extracted identification information matches the identification information of a virtual machine to be migrated.

摘要翻译： 一种计算机实现的方法，加速器硬件单元和用于支持虚拟机迁移的制品。 该方法包括：从加速器硬件单元的任务队列获取任务请求; 从所述任务请求提取相关虚拟机的识别信息; 确定所述相关虚拟机的识别信息是否与要迁移的虚拟机的识别信息相匹配，其中要迁移的虚拟机的识别信息被记录在虚拟机识别信息表中; 以及如果所提取的标识信息与要迁移的虚拟机的标识信息匹配，则从任务队列中删除任务请求。

公开(公告)号：US09870255B2

公开(公告)日：2018-01-16

申请号：US13557211

申请日：2012-07-25

申请人： Rui Hou ,  Yi Ge ,  Kun Wang ,  Zhen Bo Zhu

发明人： Rui Hou ,  Yi Ge ,  Kun Wang ,  Zhen Bo Zhu

IPC分类号： G06F15/00 ,  G06F15/76 ,  G06F9/48 ,  G06F9/54

CPC分类号： G06F9/4843 ,  G06F9/54 ,  G06F2209/509

摘要： Provided is a hardware accelerator, central processing unit, and computing device. A hardware accelerator includes a task accelerating unit configured to, in response to a request for a new task issued by a hardware thread, accelerate the processing of the new task and produce a processing result for the task; a task time prediction unit configured to predict the total waiting time of the new task for returning to a specified address associated with the hardware thread. One aspect of this disclosure makes the hardware thread aware of the time to be waited for before getting a processing result, facilitating its task planning accordingly.

公开(公告)号：US09086980B2

公开(公告)日：2015-07-21

申请号：US13564350

申请日：2012-08-01

申请人： Yi Ge ,  Rui Hou ,  Kun Wang ,  Hong Bo Zeng ,  Yu Zhang

发明人： Yi Ge ,  Rui Hou ,  Kun Wang ,  Hong Bo Zeng ,  Yu Zhang

IPC分类号： G06F12/08

CPC分类号： G06F12/0895 ,  Y02D10/13

摘要： The present disclosure provides a method, device, and system for processing a request in a multi-core system. The method comprises steps of: receiving a request for data by a filter from a requesting unit; comparing an indicator indicative of a logical partition in the request with an indicator indicative of the logical partition in a record of the filter; searching in a unit where the filter is located based on the request and returning a search result to the requesting unit if a comparison result matches; and returning a NONE response to the requesting unit from the filter if the comparison result does not match.

摘要翻译： 本公开提供了一种用于在多核系统中处理请求的方法，设备和系统。 该方法包括以下步骤：通过过滤器从请求单元接收对数据的请求; 将指示所述请求中的逻辑分区的指示符与指示所述过滤器的记录中的所述逻辑分区的指示符进行比较; 如果比较结果匹配，则根据请求在过滤器所在单元中进行搜索，并将搜索结果返回给请求单元; 并且如果比较结果不匹配，则从过滤器返回NONE响应到请求单元。

公开(公告)号：US09870256B2

公开(公告)日：2018-01-16

申请号：US13572921

申请日：2012-08-13

申请人： Rui Hou ,  Yi Ge ,  Kun Wang ,  Zhen Bo Zhu

发明人： Rui Hou ,  Yi Ge ,  Kun Wang ,  Zhen Bo Zhu

IPC分类号： G06F15/00 ,  G06F15/76 ,  G06F9/48 ,  G06F9/54

CPC分类号： G06F9/4843 ,  G06F9/54 ,  G06F2209/509

摘要： Provided is a hardware accelerator and method, central processing unit, and computing device. A hardware accelerating method includes, in response to a request for a new task issued by a hardware thread, accelerating processing of the new task and producing a processing result for the task. A predicting step predicts total waiting time of the new task for returning to a specified address associated with the hardware thread.

公开(公告)号：US20130031553A1

公开(公告)日：2013-01-31

申请号：US13557211

申请日：2012-07-25

申请人： Rui Hou ,  Yi Ge ,  Kun Wang ,  Zhen Bo Zhu

发明人： Rui Hou ,  Yi Ge ,  Kun Wang ,  Zhen Bo Zhu

IPC分类号： G06F9/46

CPC分类号： G06F9/4843 ,  G06F9/54 ,  G06F2209/509

摘要： Provided is a hardware accelerator, central processing unit, and computing device. A hardware accelerator includes a task accelerating unit configured to, in response to a request for a new task issued by a hardware thread, accelerate the processing of the new task and produce a processing result for the task; a task time prediction unit configured to predict the total waiting time of the new task for returning to a specified address associated with the hardware thread. One aspect of this disclosure makes the hardware thread aware of the time to be waited for before getting a processing result, facilitating its task planning accordingly.

摘要翻译： 提供了硬件加速器，中央处理单元和计算设备。 硬件加速器包括：任务加速单元，被配置为响应于由硬件线程发出的新任务的请求，加速新任务的处理并产生该任务的处理结果; 任务时间预测单元，被配置为预测新任务的总等待时间，以返回到与硬件线程相关联的指定地址。 本公开的一个方面使得硬件线程在获得处理结果之前了解等待的时间，从而有助于其相应的任务规划。

公开(公告)号：US20100217945A1

公开(公告)日：2010-08-26

申请号：US12708634

申请日：2010-02-19

申请人： Yi Ge ,  Rui Hou ,  Huayong Wang

发明人： Yi Ge ,  Rui Hou ,  Huayong Wang

IPC分类号： G06F12/00 ,  G06F12/06

CPC分类号： G06F9/30105 ,  G06F9/30116 ,  G06F9/3834 ,  G06F9/384 ,  G06F9/3842 ,  G06F9/3863 ,  G06F9/528

摘要： The present invention provides a method, apparatus and article of manufacture, for fast context saving in transactional memory. The method creates a mapping table that includes entries corresponding to architectural registers. Each entry includes a physical register index and shadow bit of a first physical register mapped to an architectural register. In response to a detection that an update occurs to an architectural register in a transaction and its shadow bit being an invalid value, the method sets the shadow bit to be a valid value and sets a shadow register for the architectural register using the physical register index of the first physical register. The method maps a second physical register to the shadow register in order to save a modified value generated by an update process and saves the original value before the update process by use of the first physical register corresponding to the architecture register.

摘要翻译： 本发明提供了一种用于在事务存储器中快速上下文保存的方法，装置和制品。 该方法创建一个包含对应于架构寄存器的条目的映射表。 每个条目包括映射到架构寄存器的第一物理寄存器的物理寄存器索引和影像位。 响应于检测到交易中的体系结构寄存器发生更新，并且其影子位是无效值，则该方法将阴影位设置为有效值，并使用物理寄存器索引为体系结构寄存器设置影子寄存器 的第一个物理登记册。 该方法将第二个物理寄存器映射到影子寄存器，以便保存由更新过程生成的修改值，并通过使用对应于架构寄存器的第一个物理寄存器在更新过程之前保存原始值。