公开(公告)号：US08228683B2

公开(公告)日：2012-07-24

申请号：US12494704

申请日：2009-06-30

申请人： Yi-Chang Hsu ,  Ching-Feng Hsieh

发明人： Yi-Chang Hsu ,  Ching-Feng Hsieh

IPC分类号： H05K1/11 ,  H05K1/14

CPC分类号： H01R12/52 ,  H05K1/0237 ,  H05K1/148

摘要： A framework of wireless network access device, comprising a communication circuit board with a first electrical connecting portion, a wireless transmission circuit board with a second electrical connecting portion, and at least a signal transmission element connecting with the first and second connecting portions respectively, wherein the signal transmission element is provided for transmitting a signal between the communication circuit board and the wireless transmission circuit board, so as to solve drawbacks of the prior art.

摘要翻译： 一种无线网络接入装置的框架，包括具有第一电连接部分的通信电路板，具有第二电连接部分的无线传输电路板，以及至少与第一和第二连接部分连接的信号传输元件，其中 信号传输元件用于在通信电路板和无线传输电路板之间发送信号，以解决现有技术的缺点。

公开(公告)号：US20100169697A1

公开(公告)日：2010-07-01

申请号：US12434139

申请日：2009-05-01

申请人： Yi-Chang Hsu ,  Chen-Kuo Huang ,  Ching-Feng Hsieh ,  Jen-Huan Yu

发明人： Yi-Chang Hsu ,  Chen-Kuo Huang ,  Ching-Feng Hsieh ,  Jen-Huan Yu

IPC分类号： G06F1/08

CPC分类号： H03K19/1732

摘要： A control device having an output pin expansion function and an output pin expansion method thereof are provided. The method includes: connecting at least a shift register unit having a plurality of data transmission pins to a control unit such that the shift register unit can receive strobe signals, a multi-bit data stream, clock signals and enable signals generated by the control unit; sending an enable signal by the control unit so as to allow the shift register unit to shift and store each bit of a multi-bit data stream according to a clock signal generated by the control unit; and sending a strobe signal by the control unit so as to allow the shift register unit to output the multi-bit data in parallel format as opposed to the received serial format through the plurality of data transmission pins, thereby allowing a processing device to interface with more devices (such as LED state indicators) than its fixed number of dedicated output pins would conveniently allow, thus saving costs and board space.

摘要翻译： 提供具有输出引脚扩展功能和输出引脚扩展方法的控制装置。 该方法包括：至少将具有多个数据传输引脚的移位寄存器单元连接到控制单元，使得移位寄存器单元可以接收选通信号，多位数据流，由控制单元产生的时钟信号和使能信号 ; 通过所述控制单元发送使能信号，以允许所述移位寄存器单元根据由所述控制单元生成的时钟信号来移位和存储多位数据流的每一位; 并且通过所述控制单元发送选通信号，以允许所述移位寄存器单元通过所述多个数据传输引脚与所接收的串行格式相反地以并行格式输出所述多位数据，从而允许处理设备与 更多的设备（如LED状态指示器）比其固定数量的专用输出引脚将方便地允许，从而节省成本和电路板空间。

公开(公告)号：US20100167647A1

公开(公告)日：2010-07-01

申请号：US12494704

申请日：2009-06-30

申请人： Yi-Chang Hsu ,  Ching-Feng Hsieh

发明人： Yi-Chang Hsu ,  Ching-Feng Hsieh

IPC分类号： H04B7/00

CPC分类号： H01R12/52 ,  H05K1/0237 ,  H05K1/148

摘要： A framework of wireless network access device, comprising a communication circuit board with a first electrical connecting portion, a wireless transmission circuit board with a second electrical connecting portion, and at least a signal transmission element connecting with the first and second connecting portions respectively, wherein the signal transmission element is provided for transmitting a signal between the communication circuit board and the wireless transmission circuit board, so as to solve drawbacks of the prior art.

摘要翻译： 一种无线网络接入装置的框架，包括具有第一电连接部分的通信电路板，具有第二电连接部分的无线传输电路板，以及至少与第一和第二连接部分连接的信号传输元件，其中 信号传输元件用于在通信电路板和无线传输电路板之间发送信号，以解决现有技术的缺点。

公开(公告)号：US08307126B2

公开(公告)日：2012-11-06

申请号：US12434139

申请日：2009-05-01

申请人： Yi-Chang Hsu ,  Chen-Kuo Huang ,  Ching-Feng Hsieh ,  Jen-Huan Yu

发明人： Yi-Chang Hsu ,  Chen-Kuo Huang ,  Ching-Feng Hsieh ,  Jen-Huan Yu

IPC分类号： G06F3/00

CPC分类号： H03K19/1732

摘要： A control device having an output pin expansion function and an output pin expansion method thereof are provided. The method includes: connecting at least a shift register unit having a plurality of data transmission pins to a control unit such that the shift register unit can receive strobe signals, a multi-bit data stream, clock signals and enable signals generated by the control unit; sending an enable signal by the control unit so as to allow the shift register unit to shift and store each bit of a multi-bit data stream according to a clock signal generated by the control unit; and sending a strobe signal by the control unit so as to allow the shift register unit to output the multi-bit data in parallel format as opposed to the received serial format through the plurality of data transmission pins, thereby allowing a processing device to interface with more devices (such as LED state indicators) than its fixed number of dedicated output pins would conveniently allow, thus saving costs and board space.

摘要翻译： 提供具有输出引脚扩展功能和输出引脚扩展方法的控制装置。 该方法包括：至少将具有多个数据传输引脚的移位寄存器单元连接到控制单元，使得移位寄存器单元可以接收选通信号，多位数据流，由控制单元产生的时钟信号和使能信号 ; 通过所述控制单元发送使能信号，以允许所述移位寄存器单元根据由所述控制单元生成的时钟信号来移位和存储多位数据流的每一位; 并且通过控制单元发送选通信号，以允许移位寄存器单元通过多个数据传输引脚与所接收的串行格式相反地以并行格式输出多位数据，从而允许处理设备与 更多的设备（如LED状态指示器）比其固定数量的专用输出引脚将方便地允许，从而节省成本和电路板空间。

公开(公告)号：USD621359S1

公开(公告)日：2010-08-10

申请号：US29333490

申请日：2009-03-10

申请人： Yi-Chang Hsu ,  Ching-Feng Hsieh

设计人： Yi-Chang Hsu ,  Ching-Feng Hsieh

公开(公告)号：US20080063212A1

公开(公告)日：2008-03-13

申请号：US11616874

申请日：2006-12-28

申请人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Wei-Fen Chiang ,  Jack Lin ,  Li-Ying Chang

发明人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Wei-Fen Chiang ,  Jack Lin ,  Li-Ying Chang

IPC分类号： H04R29/00 ,  G01R13/00

CPC分类号： G01R31/31917 ,  G01R31/31932

摘要： The invention discloses a circuit testing apparatus for testing a device under test. The circuit testing apparatus includes a filtering circuit, an amplifying circuit, a comparing module, and a result-examining module. The filtering circuit filters an analog output signal generated from the device under test to generate a filtered signal. The amplifying circuit amplifies the filtered signal to generate an amplified signal. The comparing module compares the amplified signal with at least one reference level to generate at least one result signal accordingly. The result-examining module examines the result signal to determine a test result for the device under test.

摘要翻译： 本发明公开了一种用于测试被测设备的电路测试装置。 电路测试装置包括滤波电路，放大电路，比较模块和结果检查模块。 滤波电路对从被测器件产生的模拟输出信号进行滤波以产生滤波信号。 放大电路放大经滤波的信号以产生放大信号。 比较模块将放大的信号与至少一个参考电平进行比较以相应地产生至少一个结果信号。 结果检查模块检查结果信号，以确定被测设备的测试结果。

公开(公告)号：US08228384B2

公开(公告)日：2012-07-24

申请号：US11616874

申请日：2006-12-28

申请人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Wei-Fen Chiang ,  Jack Lin ,  Li-Ying Chang

发明人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Wei-Fen Chiang ,  Jack Lin ,  Li-Ying Chang

IPC分类号： H04N17/00

CPC分类号： G01R31/31917 ,  G01R31/31932

摘要： The invention discloses a circuit testing apparatus for testing a device under test. The circuit testing apparatus includes a filtering circuit, an amplifying circuit, a comparing module, and a result-examining module. The filtering circuit filters an analog output signal generated from the device under test to generate a filtered signal. The amplifying circuit amplifies the filtered signal to generate an amplified signal. The comparing module compares the amplified signal with at least one reference level to generate at least one result signal accordingly. The result-examining module examines the result signal to determine a test result for the device under test.

摘要翻译： 本发明公开了一种用于测试被测设备的电路测试装置。 电路测试装置包括滤波电路，放大电路，比较模块和结果检查模块。 滤波电路对从被测器件产生的模拟输出信号进行滤波以产生滤波信号。 放大电路放大经滤波的信号以产生放大信号。 比较模块将放大的信号与至少一个参考电平进行比较以相应地产生至少一个结果信号。 结果检查模块检查结果信号，以确定被测设备的测试结果。

公开(公告)号：US08037089B2

公开(公告)日：2011-10-11

申请号：US12260484

申请日：2008-10-29

申请人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Jie-Wei Huang

发明人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Jie-Wei Huang

IPC分类号： G06F7/00 ,  G06F17/30

CPC分类号： G01R31/31907

摘要： A test system for testing a plurality of devices under test is disclosed. The test system includes a tester and a plurality of processors. The tester is used for providing a plurality of control signals and determining a plurality of test results for the devices under test according to a plurality of measurement results. Each processor coupled to the tester is used for generating a plurality of test signals according to the plurality of control signals. The plurality of devices under test respectively generates the plurality of test results according to the plurality of test signals.

摘要翻译： 公开了一种用于测试被测设备的测试系统。 测试系统包括测试器和多个处理器。 测试器用于提供多个控制信号，并根据多个测量结果确定被测设备的多个测试结果。 耦合到测试器的每个处理器用于根据多个控制信号产生多个测试信号。 被测试的多个设备分别根据多个测试信号产生多个测试结果。

公开(公告)号：US20070024314A1

公开(公告)日：2007-02-01

申请号：US11495515

申请日：2006-07-31

申请人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Li-Jieu Hsu

发明人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Li-Jieu Hsu

IPC分类号： G01R31/26

CPC分类号： G01R31/2889

摘要： The present invention relates to a test system, and in particular relates to a test system capable of testing a plurality of chips simultaneously. The test system comprises a single-chip tester and a handler. The single-chip tester further comprises a pattern memory and a micro-processor. The pattern memory comprises a plurality of pattern units for respectively performing a function pattern test on the plurality of chips and generating a test result mapping to the plurality of chips. The micro-processor performs various tests and generating an interface control signal according to the test result. The handler initiates the micro-processor for performing various tests and receives the interface control signal to finish testing the plurality of chips. The pluralities of chips are set to the handler.

摘要翻译： 本发明涉及一种测试系统，特别涉及能同时测试多个芯片的测试系统。 测试系统包括单片测试仪和处理器。 单芯片测试器还包括模式存储器和微处理器。 图案存储器包括多个模式单元，用于分别对多个芯片执行功能模式测试，并产生映射到多个芯片的测试结果。 微处理器根据测试结果执行各种测试并产生接口控制信号。 处理器启动用于执行各种测试的微处理器，并接收接口控制信号以完成多个芯片的测试。 多个芯片被设置为处理程序。

公开(公告)号：US20070268037A1

公开(公告)日：2007-11-22

申请号：US11608226

申请日：2006-12-07

申请人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Wei-Fen Chiang ,  Hung-Wei Chen

发明人： Cheng-Yung Teng ,  Yi-Chang Hsu ,  Wei-Fen Chiang ,  Hung-Wei Chen

IPC分类号： G01R31/26

CPC分类号： G01R31/3167

摘要： The present invention discloses a circuit testing apparatus for testing a device under test. The circuit testing apparatus includes a signal transformation module, a meter, and a logic tester. The signal transformation module is coupled to the device under test and transforms an analog output signal generated by the device under test into a DC signal. The meter is coupled to the signal transformation module and measures the DC signal so as to generate a digital measuring result. The logic tester is coupled to the meter and determines a test result for the device under test according to the digital measuring result.

摘要翻译： 本发明公开了一种用于测试被测器件的电路测试装置。 电路测试装置包括信号变换模块，仪表和逻辑测试仪。 信号变换模块耦合到被测器件，并将由被测器件产生的模拟输出信号转换为直流信号。 仪表耦合到信号变换模块，测量直流信号，产生数字测量结果。 逻辑测试仪与仪表相连，根据数字测量结果确定被测设备的测试结果。