公开(公告)号：US08072489B2

公开(公告)日：2011-12-06

申请号：US11592912

申请日：2006-11-03

Applicant: Ying-Cheng Wu ,  Ying-Tang Su

Inventor： Ying-Cheng Wu ,  Ying-Tang Su

IPC: A61B1/04 ,  H04N5/225

CPC classification number: H04N5/2253 ,  H01L2224/48091 ,  H01L2224/8592 ,  H01L2924/16195 ,  H04N5/2254 ,  H04N5/2257 ,  H01L2924/00014

Abstract: A chip package (101) and a lens module (103) mounted on the chip package are provided. The chip package includes a substrate (20), a first chip (40), a second chip (70), and a cover (80). The first chip is mounted on the substrate and is electrically connected with the substrate via a first plurality of wires (50a). The second chip is mounted above the first chip and above the wires connected with the first chip and is electrically connected with the substrate via a second plurality of wires (50b). The cover is mounted above the second chip and the wires connected with the second chip.

Abstract translation: 提供安装在芯片封装上的芯片封装（101）和透镜模块（103）。 芯片封装包括基板（20），第一芯片（40），第二芯片（70）和盖（80）。 第一芯片安装在基板上，并且经由第一多根导线（50a）与基板电连接。 所述第二芯片安装在所述第一芯片上方并且与所述第一芯片连接的导线上方并且经由第二多个导线（50b）与所述基板电连接。 盖被安装在第二芯片上方，并且电线与第二芯片连接。

公开(公告)号：US20070165136A1

公开(公告)日：2007-07-19

申请号：US11592912

申请日：2006-11-03

Applicant: Ying-Cheng Wu ,  Ying-Tang Su

Inventor： Ying-Cheng Wu ,  Ying-Tang Su

IPC: H04N5/225

CPC classification number: H04N5/2253 ,  H01L2224/48091 ,  H01L2224/8592 ,  H01L2924/16195 ,  H04N5/2254 ,  H04N5/2257 ,  H01L2924/00014

Abstract: A digital camera module (10) includes a chip package (101) and a lens module (103) mounted on the chip package. The chip package includes a substrate (20), a first chip (40), a second chip (70), and a cover (80). The first chip is mounted on the substrate and is electrically connected with the substrate via a first plurality of wires (50a). The second chip is mounted above the first chip and above the wires connected with the first chip and is electrically connected with the substrate via a second plurality of wires (50b). The cover is mounted above the second chip and the wires connected with the second chip.

Abstract translation: 数字照相机模块（10）包括芯片封装（101）和安装在芯片封装上的透镜模块（103）。 芯片封装包括基板（20），第一芯片（40），第二芯片（70）和盖（80）。 第一芯片安装在基板上，并通过第一多根导线（50a）与基板电连接。 第二芯片安装在第一芯片上方并且连接在与第一芯片连接的导线上方，并且经由第二多个导线（50b）与基板电连接。 盖被安装在第二芯片上方，并且电线与第二芯片连接。

公开(公告)号：US20070152345A1

公开(公告)日：2007-07-05

申请号：US11592848

申请日：2006-11-03

Applicant: Ying-Cheng Wu ,  Ying-Tang Su

Inventor： Ying-Cheng Wu ,  Ying-Tang Su

IPC: H01L23/52

CPC classification number: H01L25/0657 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48992 ,  H01L2224/8592 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2225/06582 ,  H01L2924/00014

Abstract: A stacked chip packaging structure (10) includes a substrate (20), a first chip (40), a second chip (70), and a cover (80). The first chip is mounted on the substrate and is electrically connected with the substrate via a first plurality of wires (50a). The second chip is mounted above the first chip and above the wires connected with the first chip and is electrically connected with the substrate via a second plurality of wires (50b). The cover is mounted above the second chip and the wires connected with the second chip. The mounting of the second chip and the cover in such a manner is facilitated through the use of an adhesive/glue (60a, 60b) that is able to function both as an adherent and as a spacer.

Abstract translation: 堆叠式芯片封装结构（10）包括基板（20），第一芯片（40），第二芯片（70）和盖（80）。 第一芯片安装在基板上，并通过第一多根导线（50a）与基板电连接。 第二芯片安装在第一芯片上方并且连接在与第一芯片连接的导线上方，并且经由第二多个导线（50b）与基板电连接。 盖被安装在第二芯片上方，并且电线与第二芯片连接。 通过使用能够既作为粘着剂又作为隔离物使用的粘合剂/胶（60a，60b），可以有利于以这种方式安装第二芯片和盖。

公开(公告)号：US07821565B2

公开(公告)日：2010-10-26

申请号：US12019918

申请日：2008-01-25

Applicant: Ying-Cheng Wu ,  Pang-Jung Liu ,  Chien-Cheng Yao ,  Shih-Min Lo

Inventor： Ying-Cheng Wu ,  Pang-Jung Liu ,  Chien-Cheng Yao ,  Shih-Min Lo

IPC: H04N5/225 ,  G02B13/16

CPC classification number: H01L27/14618 ,  H01L27/14625 ,  H01L2924/0002 ,  H04N5/2253 ,  H04N5/2257 ,  H01L2924/00

Abstract: An exemplary imaging module package includes a lens module and an imaging sensor module. The lens module includes a housing having a hollow top portion and a hollow bottom portion coaxially aligned with the hollow top portion. The imaging sensor module is received in the hollow bottom portion. The imaging sensor module includes an imaging sensor connected to the substrate and secured to the bottom portion, a substrate spaced from the bottom portion and defining at least one recess therein, and a plurality of passive components received in the at least one recess and wholly disposed below the imaging sensor.

Abstract translation: 示例性成像模块包括透镜模块和成像传感器模块。 透镜模块包括壳体，该壳体具有中空顶部部分和与中空顶部部分同轴对准的中空底部部分。 成像传感器模块被容纳在中空底部。 成像传感器模块包括连接到基板并固定到底部的成像传感器，与底部部分间隔开并在其中限定至少一个凹部的基板，以及容纳在至少一个凹部中并且完全设置的多个无源部件 成像传感器下方。

公开(公告)号：US07796188B2

公开(公告)日：2010-09-14

申请号：US11871925

申请日：2007-10-12

Applicant: Ying-Cheng Wu

Inventor： Ying-Cheng Wu

IPC: H04N5/225

CPC classification number: H04N5/2253 ,  H01L27/14618 ,  H01L2224/48091 ,  H01L2224/73265 ,  H04N5/2257 ,  H01L2924/00014

Abstract: An exemplary image sensor package includes a base, an image sensor chip, a bonding layer, and an imaging lens. The image sensor chip is disposed on the base. The image sensor chip includes a photosensitive area. The bonding layer is disposed on at least one of the image sensor chip and the base. The bonding pads surround the photosensitive area. The imaging lens is adhered onto the bonding layer and hermetically seals the photosensitive area with the bonding layer. The imaging lens is configured for forming images on the photosensitive area. The present invention also relates to a method for manufacturing the image sensor package.

Abstract translation: 示例性图像传感器封装包括基底，图像传感器芯片，结合层和成像透镜。 图像传感器芯片设置在基座上。 图像传感器芯片包括感光区域。 接合层设置在图像传感器芯片和基底中的至少一个上。 接合焊盘围绕感光区域。 将成像透镜粘附到粘合层上并用粘合层密封光敏区域。 成像透镜被配置用于在光敏区域上形成图像。 本发明还涉及图像传感器封装的制造方法。

公开(公告)号：US07538862B2

公开(公告)日：2009-05-26

申请号：US11592768

申请日：2006-11-03

Applicant: Steven Webster ,  Ying-Cheng Wu ,  Yuan-Po Wang

Inventor： Steven Webster ,  Ying-Cheng Wu ,  Yuan-Po Wang

IPC: G01N21/00

CPC classification number: H04N17/002

Abstract: A testing system (200) for digital camera modules (100) includes a first testing module (50), an assembling mechanism (60), a focusing module (62), a second testing module (70), a carrying mechanism (80), and a main processor (90). The carrying mechanism supports and transports subassemblies of the digital camera modules and the digital camera modules between the first testing module, the assembling mechanism, the focusing module and the second testing module. The first testing module, the assembling mechanism, the focusing module, the carrying mechanism, and the second testing module are all electronically connected with the main processor.

Abstract translation: 一种用于数字照相机模块（100）的测试系统（200）包括第一测试模块（50），组装机构（60），聚焦模块（62），第二测试模块（70） ，以及主处理器（90）。 携带机构在第一测试模块，组装机构，聚焦模块和第二测试模块之间支撑和传送数字照相机模块和数字照相机模块的子组件。 第一测试模块，组装机构，聚焦模块，承载机构和第二测试模块都与主处理器电连接。

公开(公告)号：US20080203512A1

公开(公告)日：2008-08-28

申请号：US12151369

申请日：2008-05-06

Applicant: Steven Webster ,  Ying-Cheng Wu

Inventor： Steven Webster ,  Ying-Cheng Wu

IPC: H01L31/0203

CPC classification number: H04N5/2253 ,  G02B7/02 ,  H01L27/14618 ,  H01L27/14625 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/73265 ,  H04N5/2254 ,  H04N5/2257 ,  H01L2924/00014

Abstract: A chip package includes a carrier (32), an image sensor chip (34), a plurality of wires (36), an adhesive means (3262) and a transparent cover (38). The carrier has a cavity (321) therein. The image sensor chip is received in the cavity, and the image sensor has a photosensitive area (344). Each wire electronically connects the image sensor chip and the carrier. The adhesive means is applied to the image sensor chip around the photosensitive area and covers at least one portion of all the wires adjacent to the photosensitive area. The adhesive means surrounds an enclosing body (3264) around the photosensitive area. The transparent cover is mounted to the carrier, and the cover is adhered to the carrier with the adhesive means. The cover with the enclosing body defines a sealing space (37) for enclosing the photosensitive area of the image sensor chip therein.

Abstract translation: 芯片封装包括载体（32），图像传感器芯片（34），多个导线（36），粘合装置（3262）和透明盖（38）。 载体在其中具有空腔（321）。 图像传感器芯片被接收在空腔中，并且图像传感器具有感光区域（344）。 每条线电子连接图像传感器芯片和载体。 粘合装置被施加到感光区周围的图像传感器芯片上，并且覆盖与感光区域相邻的所有导线的至少一部分。 粘合剂包围围绕光敏区域的封闭体（3264）。 透明盖安装在托架上，盖子用粘合剂粘合到托架上。 具有封闭体的盖限定用于将图像传感器芯片的感光区域包围在其中的密封空间（37）。

公开(公告)号：US07342215B2

公开(公告)日：2008-03-11

申请号：US11453454

申请日：2006-06-14

Applicant: Steven Webster ,  Ying-Cheng Wu ,  Kun-Hsieh Liu

Inventor： Steven Webster ,  Ying-Cheng Wu ,  Kun-Hsieh Liu

IPC: H01L27/00 ,  H01J5/02

CPC classification number: H01L27/14625 ,  H01L27/14618 ,  H01L27/14683 ,  H01L27/14685 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2924/16195 ,  H01L2924/00014

Abstract: A digital camera module package method includes the steps of: firstly, providing a carrier (30), which includes a base (24) and a leadframe (320). The base has a cavity therein and the leadframe includes a number of conductive pieces (322); Secondly, mounting an image sensor chip (34) on the base and received in the cavity, the image sensor having a photosensitive area. Thirdly, providing a plurality of wires (36), each electrically connecting the image sensor chip and a corresponding one of the conductive pieces of the carrier. Fourthly, applying an adhesive means (3262) around the image sensor chip that at least partially covers all the wires. Finally, mounting a transparent cover (38) on the carrier, where an adhesive means fixes the cover in place.

Abstract translation: 数字照相机模块封装方法包括以下步骤：首先，提供一种包括基座（24）和引线框架（320）的载体（30）。 基座在其中具有空腔，引线框架包括多个导电片（322）; 其次，将图像传感器芯片（34）安装在基座上并容纳在空腔中，图像传感器具有感光区域。 第三，提供多个电线（36），每个电线电连接图像传感器芯片和载体的相应导电片之一。 第四，在图像传感器芯片周围施加至少部分地覆盖所有电线的粘合装置（3262）。 最后，将透明盖（38）安装在载体上，其中粘合剂将盖固定到位。

公开(公告)号：US20070126915A1

公开(公告)日：2007-06-07

申请号：US11595297

申请日：2006-11-10

Applicant: Steven Webster ,  Ying-Cheng Wu ,  Kun-Hsieh Liu

Inventor： Steven Webster ,  Ying-Cheng Wu ,  Kun-Hsieh Liu

IPC: H04N5/225

CPC classification number: H04N5/2253 ,  H04N5/2254

Abstract: An image sensor chip package method includes the following steps: firstly, a plurality of shaped conductors are provided. Secondly, plastics are injected to partially enclose the conductors, thereby forming a base. Some of the conductors are exposed outside of the base. Thirdly, a ring-like middle portion is further formed on the base by means of injection. The base and the middle portion cooperatively form a space. Fourthly, an image sensor having a plurality of pads is disposed in the space. Fifthly, a number of bonding wires are provided to connect the pads and the conductors. Finally, a cover is secured to the top of the middle portion via an adhesive glue, thereby hermetically sealing the space and allowing light beams to pass therethrough.

Abstract translation: 图像传感器芯片封装方法包括以下步骤：首先，多个形导体。 其次，注射塑料以部分地包封导体，从而形成基底。 一些导体暴露在基部外部。 第三，通过注射在基座上进一步形成环状中间部分。 底座和中间部分协同地形成一个空间。 第四，具有多个焊盘的图像传感器设置在该空间中。 第五，提供多个接合线来连接焊盘和导体。 最后，通过胶粘剂将盖固定到中间部分的顶部，从而气密地密封空间并允许光束通过。

公开(公告)号：US07929033B2

公开(公告)日：2011-04-19

申请号：US12173002

申请日：2008-07-14

Applicant: Chi-Kuei Lee ,  Ying-Cheng Wu

Inventor： Chi-Kuei Lee ,  Ying-Cheng Wu

IPC: H04N5/335 ,  H01L27/00

CPC classification number: H01L27/14618 ,  H01L25/043 ,  H01L25/0657 ,  H01L27/14625 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/09701 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: An image sensor package includes a first substrate, an image sensor chip, a processing chip and a plurality of passive elements. The first substrate has a supporting surface and a bottom surface opposite to the supporting surface. The image sensor chip is disposed on the supporting surface and electrically connected to the first substrate. The image sensor chip package further includes a second substrate. The processing chip and the passive elements are mounted on the second substrate and electrically connected to the second substrate. The bottom surface of the first substrate defines a cavity for receiving the second substrate, the processing chip and the passive elements therein.

Abstract translation: 图像传感器封装包括第一基板，图像传感器芯片，处理芯片和多个无源元件。 第一基板具有支撑表面和与支撑表面相对的底表面。 图像传感器芯片设置在支撑表面上并电连接到第一基板。 图像传感器芯片封装还包括第二基板。 处理芯片和无源元件安装在第二基板上并电连接到第二基板。 第一基板的底表面限定用于接收第二基板，处理芯片和其中的无源元件的空腔。