VARACTORLESS TUNABLE OSCILLATOR
    1.
    发明申请
    VARACTORLESS TUNABLE OSCILLATOR 有权
    无级可调谐振荡器

    公开(公告)号:US20120212300A1

    公开(公告)日:2012-08-23

    申请号:US13030843

    申请日:2011-02-18

    IPC分类号: H03B5/12

    摘要: A tunable oscillator circuit is disclosed. The tunable oscillator circuit includes an inductor/capacitor (LC) tank circuit comprising a primary inductor coupled in parallel with a first capacitor bank. The LC tank resonates to produce an oscillating voltage at a frequency. The tunable oscillator circuit also includes a 90 degree phase shift buffer coupled to the LC tank and a transconductor. The transconductor is coupled to the 90 degree phase shift buffer and a secondary inductor. The tunable oscillator circuit also includes a secondary inductor that is inductively coupled to the primary inductor and receives a gain-scaled oscillating current from the transconductor. By changing the transconductance, the gain-scaled oscillating current in the secondary inductor will change, thus the effective primary inductance and the oscillation frequency can be tuned.

    摘要翻译: 公开了一种可调振荡器电路。 可调振荡器电路包括电感器/电容器(LC)槽电路,其包括与第一电容器组并联耦合的初级电感器。 LC谐振腔产生振荡电压频率。 可调振荡器电路还包括耦合到LC箱和跨导体的90度相移缓冲器。 跨导体耦合到90度相移缓冲器和次级电感器。 可调谐振荡器电路还包括次级电感器,该次级电感器感应耦合到初级电感器并且从跨导体接收增益定标的振荡电流。 通过改变跨导,次级电感器中的增益调节振荡电流将发生变化,从而可以调节有效初级电感和振荡频率。

    CONFIGURABLE MULTI-MODE OSCILLATORS
    2.
    发明申请
    CONFIGURABLE MULTI-MODE OSCILLATORS 审中-公开
    可配置的多模振荡器

    公开(公告)号:US20140009236A1

    公开(公告)日:2014-01-09

    申请号:US13541258

    申请日:2012-07-03

    IPC分类号: H03B5/12

    摘要: Multi-mode oscillators supporting multiple modes and having different desirable characteristics (e.g., good phase noise or low power consumption) in different modes are disclosed. In an exemplary design, an apparatus includes first and second transistors of a first transistor type (e.g., NMOS transistors) and third and fourth transistors of a second transistor type (e.g., PMOS transistors) for a multi-mode oscillator. The third and fourth transistors are coupled (e.g., directly) to the first and second transistors. The first and second transistors are enabled in a first mode to provide signal gain for the oscillator and generate an oscillator signal in the first mode. The first to fourth transistors are enabled in a second mode to provide signal gain for the oscillator and generate the oscillator signal in the second mode. Different supply voltages may be provided at different supply nodes of the oscillator in the first and second modes.

    摘要翻译: 公开了支持多种模式并具有不同模式的不同期望特性(例如良好的相位噪声或低功耗)的多模式振荡器。 在示例性设计中,装置包括第一晶体管类型(例如,NMOS晶体管)的第一和第二晶体管以及用于多模式振荡器的第二晶体管类型(例如PMOS晶体管)的第三和第四晶体管。 第三和第四晶体管耦合(例如,直接)到第一和第二晶体管。 第一和第二晶体管在第一模式中被使能以提供振荡器的信号增益并且在第一模式中产生振荡器信号。 第一至第四晶体管在第二模式下被使能以提供振荡器的信号增益并在第二模式中产生振荡器信号。 可以在第一和第二模式中在振荡器的不同供应节点处提供不同的电源电压。

    Varactorless tunable oscillator
    3.
    发明授权
    Varactorless tunable oscillator 有权
    无变矩器可调谐振荡器

    公开(公告)号:US08665033B2

    公开(公告)日:2014-03-04

    申请号:US13030843

    申请日:2011-02-18

    IPC分类号: H03B5/08 H03B5/18

    摘要: A tunable oscillator circuit is disclosed. The tunable oscillator circuit includes an inductor/capacitor (LC) tank circuit comprising a primary inductor coupled in parallel with a first capacitor bank. The LC tank resonates to produce an oscillating voltage at a frequency. The tunable oscillator circuit also includes a 90 degree phase shift buffer coupled to the LC tank and a transconductor. The transconductor is coupled to the 90 degree phase shift buffer and a secondary inductor. The tunable oscillator circuit also includes a secondary inductor that is inductively coupled to the primary inductor and receives a gain-scaled oscillating current from the transconductor. By changing the transconductance, the gain-scaled oscillating current in the secondary inductor will change, thus the effective primary inductance and the oscillation frequency can be tuned.

    摘要翻译: 公开了一种可调振荡器电路。 可调振荡器电路包括电感器/电容器(LC)槽电路,其包括与第一电容器组并联耦合的初级电感器。 LC谐振腔产生振荡电压频率。 可调振荡器电路还包括耦合到LC箱和跨导体的90度相移缓冲器。 跨导体耦合到90度相移缓冲器和次级电感器。 可调谐振荡器电路还包括次级电感器,该次级电感器感应耦合到初级电感器并且从跨导体接收增益定标的振荡电流。 通过改变跨导,次级电感器中的增益调节振荡电流将发生变化,从而可以调节有效初级电感和振荡频率。

    FRACTIONAL RESOLUTION INTEGER-N FREQUENCY SYNTHESIZER
    4.
    发明申请
    FRACTIONAL RESOLUTION INTEGER-N FREQUENCY SYNTHESIZER 审中-公开
    分数分解整数N频率合成器

    公开(公告)号:US20100073052A1

    公开(公告)日:2010-03-25

    申请号:US12563790

    申请日:2009-09-21

    IPC分类号: H03L7/08

    摘要: Embodiments of the invention may provide for a frequency synthesizer capable to generate an output signal in which the frequency is a fractional portion of the reference frequency without a fractional divider. Based on mathematical relationship (“relatively prime”) between the reference frequency and other injection frequencies mixed with the output signal of a voltage controlled oscillator, the synthesizer is able to generate signals evenly spaced in the frequency domain like Fractional-N PLLs. The synthesizer may include an Integer-N PLL, a SSB mixer, frequency dividers, and frequency multipliers. A Integer-N PLL may include a Phase and Frequency Detector, a Charge Pump, a Loop Filter and a Dual Modulus Divider. By not requiring a fractional divider, the frequency synthesizer is able to avoid adopting any compensation circuits such as Sigma-Delta modulator to suppress fractional spurs. Therefore, the chip area, power consumption and complexity will be reduced considerably.

    摘要翻译: 本发明的实施例可以提供能够产生输出信号的频率合成器,其中频率是参考频率的小数部分而没有分数分频器。 基于与压控振荡器的输出信号混合的参考频率和其他注入频率之间的数学关系(“相对主要”),合成器能够在频域中产生均匀间隔的信号,如分数N PLL。 合成器可以包括整数N PLL,SSB混频器,分频器和频率乘法器。 整数N PLL可以包括相位和频率检测器,电荷泵,环路滤波器和双模数分频器。 通过不需要分数分频器,频率合成器能够避免采用诸如Sigma-Delta调制器之类的任何补偿电路来抑制分数杂散。 因此,芯片面积,功耗和复杂度将大大降低。