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12 条记录 (耗时 0.058 秒)

    Chip inductor, chip inductor array and method of manufacturing same
    4.
    发明授权
    Chip inductor, chip inductor array and method of manufacturing same 失效
    芯片电感，芯片电感阵列及其制造方法

    公开(公告)号：US06362713B1

    公开(公告)日：2002-03-26

    申请号：US08916257

    申请日：1997-08-22

    申请人： Hiroyuki Masuda ,  Kinya Iri ,  Kenichiro Nogi ,  Nobuo Mamada

    发明人： Hiroyuki Masuda ,  Kinya Iri ,  Kenichiro Nogi ,  Nobuo Mamada

    IPC分类号： H01F2702

    CPC分类号： H01F17/045 ,  H01F41/046 ,  H01F41/064

    摘要： A chip inductor is made up of a coiled conducting wire and a magnetic member which is formed by sintering and in which the coiled conducting wire is embedded. Both end portions of the coiled conducting wire are exposed to both end surfaces of the magnetic member. External electrodes are formed with conducting thin films and are connected to respective end portions of the coiled conducting wire. An inorganic material is interposed in a clearance between winds of both end portions of the conducting wire and external surfaces of the magnetic member and a clearance between adjoining winds of the conducting wire.

    摘要翻译： 片状电感器由线圈导线和通过烧结形成的磁性构件组成，其中嵌有线圈导线。 线圈导线的两端部暴露于磁性部件的两端面。 外部电极形成有导电薄膜并连接到线圈导线的相应端部。 导电线的两端部的风与磁性体的外表面之间的间隙和导线的相邻风之间的间隙插入无机材料。

    Circuit board having thereon coupled ceramic capacitors and method for the manufacture thereof
    5.
    发明授权
    Circuit board having thereon coupled ceramic capacitors and method for the manufacture thereof 有权
    具有耦合陶瓷电容器的电路板及其制造方法

    公开(公告)号：US06304425B1

    公开(公告)日：2001-10-16

    申请号：US09441960

    申请日：1999-11-17

    申请人： Nobuo Mamada

    发明人： Nobuo Mamada

    IPC分类号： H01G406

    CPC分类号： H05K1/181 ,  H05K1/0237 ,  H05K2201/10545 ,  H05K2201/10636 ,  H05K2201/2045 ,  Y02P70/611 ,  Y10T29/4913

    摘要： A circuit board having coupled multilayered ceramic capacitors mounted thereon considerably reduces the generation of sounds developed by piezoelectric effects in the capacitors. A method for mounting the capacitors on the circuit board includes the step of forming lands for mounting the capacitors thereon at substantially plane-symmetrical positions on the front surface and the back surface of the circuit board, two lands at their substantially plane-symmetrical positions being connected each other. The capacitors, which are substantially identical each other, are then mounted on the lands of the front and the back surfaces such that the capacitors are disposed at substantially plane-symmetrical positions and electrically coupled to the lands. As a result, vibrations being transferred from the capacitors to the circuit board are cancelled out with each other and the resonance of the circuit board due to the vibrations from the capacitors is prevented, resulting in the generation of audible sounds with high sound pressure levels being considerably reduced compared to that of the prior art.

    摘要翻译： 具有安装在其上的耦合多层陶瓷电容器的电路板显着地减少了由电容器中的压电效应产生的声音。 用于将电容器安装在电路板上的方法包括以下步骤：在电路板的前表面和背面上的基本上平面对称的位置处形成用于将电容器安装在其上的平台，其基本平面对称位置处的两个平台 相互连接 然后将彼此基本相同的电容器安装在前表面和后表面的焊盘上，使得电容器被布置在基本上平面对称的位置并电耦合到焊盘。 结果，从电容器传递到电路板的振动彼此抵消，并且防止了由于电容器的振动引起的电路板的谐振，导致产生具有高声压级的可听见的声音 与现有技术相比显着降低。

    Circuit board having thereon coupled ceramic capacitors and method for the manufacture thereof
    6.
    发明授权
    Circuit board having thereon coupled ceramic capacitors and method for the manufacture thereof 有权
    具有耦合陶瓷电容器的电路板及其制造方法

    公开(公告)号：US06860954B2

    公开(公告)日：2005-03-01

    申请号：US09934495

    申请日：2001-08-22

    申请人： Nobuo Mamada

    发明人： Nobuo Mamada

    IPC分类号： H01G4/12 ,  H01G2/06 ,  H05K1/02 ,  H05K1/18 ,  C03B29/00

    CPC分类号： H05K1/181 ,  H05K1/0237 ,  H05K2201/10545 ,  H05K2201/10636 ,  H05K2201/2045 ,  Y02P70/611 ,  Y10T29/4913

    摘要： A circuit board having coupled multilayered ceramic capacitors mounted thereon considerably reduces the generation of sounds developed by piezoelectric effects in the capacitors. A method for mounting the capacitors on the circuit board includes the step of forming lands for mounting the capacitors thereon at substantially plane-symmetrical positions on the front surface and the back surface of the circuit board, two lands at their substantially plane-symmetrical positions being connected each other. The capacitors, which are substantially identical each other, are then mounted on the lands of the front and the back surfaces such that the capacitors are disposed at substantially plane-symmetrical positions and electrically coupled to the lands. As a result, vibrations being transferred from the capacitors to the circuit board are cancelled out with each other and the resonance of the circuit board due to the vibrations from the capacitors is prevented, resulting in the generation of audible sounds with high sound pressure levels being considerably reduced compared to that of the prior art.

    摘要翻译： 具有安装在其上的耦合多层陶瓷电容器的电路板显着地减少了由电容器中的压电效应产生的声音。 用于将电容器安装在电路板上的方法包括以下步骤：在电路板的前表面和背面上的基本上平面对称的位置处形成用于将电容器安装在其上的平台，其基本平面对称位置处的两个平台 相互连接 然后将彼此基本相同的电容器安装在前表面和后表面的焊盘上，使得电容器被布置在基本上平面对称的位置并电耦合到焊盘。 结果，从电容器传递到电路板的振动彼此抵消，并且防止了由于电容器的振动引起的电路板的谐振，导致产生具有高声压级的可听见的声音 与现有技术相比显着降低。

    Method of manufacturing chip inductors and chip inductor arrays
    7.
    发明授权
    Method of manufacturing chip inductors and chip inductor arrays 失效
    芯片电感和芯片电感阵列的制造方法

    公开(公告)号：US06189202B1

    公开(公告)日：2001-02-20

    申请号：US09207678

    申请日：1998-12-09

    申请人： Hiroyuki Masuda ,  Kinya Iri ,  Kenichiro Nogi ,  Nobuo Mamada

    发明人： Hiroyuki Masuda ,  Kinya Iri ,  Kenichiro Nogi ,  Nobuo Mamada

    IPC分类号： H01F4106

    CPC分类号： H01F17/045 ,  H01F41/046 ,  H01F41/064 ,  Y10T29/49071 ,  Y10T29/49076

    摘要： A chip inductor is made up of a coiled conducting wire and a magnetic member which is formed by sintering and in which the coiled conducting wire is embedded. Both end portions of the coiled conducting wire are exposed to both end surfaces of the magnetic member. External electrodes are formed with conducting thin films and are connected to respective end portions of the coiled conducting wire. An inorganic material is interposed in a clearance between winds of both end portions of the conducting wire and external surfaces of the magnetic member and a clearance between adjoining winds of the conducting wire.

    摘要翻译： 片状电感器由线圈导线和通过烧结形成的磁性构件组成，其中嵌有线圈导线。 线圈导线的两端部暴露于磁性部件的两端面。 外部电极形成有导电薄膜并连接到线圈导线的相应端部。 导电线的两端部的风与磁性体的外表面之间的间隙和导线的相邻风之间的间隙插入无机材料。

    Chip inductor, chip inductor array and method of manufacturing same
    8.
    发明授权
    Chip inductor, chip inductor array and method of manufacturing same 失效
    芯片电感，芯片电感阵列及其制造方法

    公开(公告)号：US06791444B1

    公开(公告)日：2004-09-14

    申请号：US09635098

    申请日：2000-08-09

    申请人： Hiroyuki Masuda ,  Kinya Iri ,  Kenichiro Nogi ,  Nobuo Mamada

    发明人： Hiroyuki Masuda ,  Kinya Iri ,  Kenichiro Nogi ,  Nobuo Mamada

    IPC分类号： H01F2702

    CPC分类号： H01F41/046 ,  H01F17/045 ,  H01F41/064

    摘要： A chip inductor is made up of a coiled conducting wire and a magnetic member which is formed by sintering and in which the coiled conducting wire is embedded. Both end portions of the coiled conducting wire are exposed to both end surfaces of the magnetic member. External electrodes are formed with conducting thin films and are connected to respective end portions of the coiled conducting wire. An inorganic material is interposed in a clearance between winds of both end portions of the conducting wire and external surfaces of the magnetic member and a clearance between adjoining winds of the conducting wire.

    摘要翻译： 片状电感器由线圈导线和通过烧结形成的磁性构件组成，其中嵌有线圈导线。 线圈导线的两端部暴露于磁性部件的两端面。 外部电极形成有导电薄膜并连接到线圈导线的相应端部。 导电线的两端部的风与磁性体的外表面之间的间隙和导线的相邻风之间的间隙插入无机材料。

    Method of manufacturing a chip inductor
    9.
    发明授权
    Method of manufacturing a chip inductor 失效
    制造芯片电感的方法

    公开(公告)号：US06343413B1

    公开(公告)日：2002-02-05

    申请号：US09650755

    申请日：2000-08-30

    申请人： Hiroyuki Masuda ,  Kinya Iri ,  Kenichiro Nogi ,  Nobuo Mamada

    发明人： Hiroyuki Masuda ,  Kinya Iri ,  Kenichiro Nogi ,  Nobuo Mamada

    IPC分类号： H01F4106

    CPC分类号： H01F17/045 ,  H01F41/046 ,  H01F41/064 ,  Y10T29/49071 ,  Y10T29/49076

    摘要： A chip inductor is made up of a coiled conducting wire and a magnetic member which is formed by sintering and in which the coiled conducting wire is embedded. Both end portions of the coiled conducting wire are exposed to both end surfaces of the magnetic member. External electrodes are formed with conducting thin films and are connected to respective end portions of the coiled conducting wire. An inorganic material is interposed in a clearance between winds of both end portions of the conducting wire and external surfaces of the magnetic member and a clearance between adjoining winds of the conducting wire.

    摘要翻译： 片状电感器由线圈导线和通过烧结形成的磁性构件组成，其中嵌有线圈导线。 线圈导线的两端部暴露于磁性部件的两端面。 外部电极形成有导电薄膜并连接到线圈导线的相应端部。 导电线的两端部的风与磁性体的外表面之间的间隙和导线的相邻风之间的间隙插入无机材料。

    Method of manufacturing a chip inductor
    10.
    发明授权
    Method of manufacturing a chip inductor 失效
    制造芯片电感的方法

    公开(公告)号：US6055721A

    公开(公告)日：2000-05-02

    申请号：US231486

    申请日：1999-01-14

    申请人： Nobuo Mamada ,  Masataka Kohara

    发明人： Nobuo Mamada ,  Masataka Kohara

    IPC分类号： H01F17/04 ,  H01F27/02 ,  H01F27/29 ,  H01F41/00 ,  H01F41/02 ,  H01F41/04 ,  H01F7/06

    CPC分类号： H01F17/045 ,  H01F27/292 ,  H01F41/0246 ,  H01F41/046 ,  H01F27/027 ,  H01F41/005 ,  Y10T29/49071 ,  Y10T29/49076

    摘要： A chip inductor has a magnetic member which is formed by sintering and a coiled conducting wire which is embedded in the magnetic member. The magnetic member has a clearance in each axial end portion thereof such that each terminal end portion of the coiled conducting wire is exposed to an outside of the magnetic member in a linear configuration. An external electrode is formed on each end portion of the magnetic member such that the external electrode penetrates into the clearance into contact with the terminal end portions of the coiled conducting wire.

    摘要翻译： 芯片电感器具有通过烧结形成的磁性部件和嵌入在磁性部件中的线圈导线。 磁性构件在其每个轴向端部具有间隙，使得线圈导线的每个末端部分以线性构型暴露于磁性构件的外部。 外部电极形成在磁性部件的每个端部上，使得外部电极穿过间隙而与线圈导线的端部接触。