-
公开(公告)号：US20110246701A1
公开(公告)日：2011-10-06
申请号：US12527441
申请日：2009-03-24
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7208 , G06F2212/7211 , G11C16/349 , G11C16/3495
摘要： Efficient leveling among a plurality of FMPKs 130 including a newly added or replaced FMPK 130. When a storage controller 110 lacks free blocks in real FMPKs 130 and any FMPK 130 of the real FMPKs 130 and an added substitute FMPK 130 are selected as leveling object devices, if the attribute of a block in the real FMPK 130 belonging to the leveling object devices is “Hot,” data larger than a threshold value from among data belonging to that block is migrated to a block in the substitute FMPK 130; or if the attribute of a block in the real FMPK 130 belonging to the leveling object devices is “Cold,” data smaller than the threshold value from among data belonging to that block is migrated to a block in the substitute FMPK 130.
摘要翻译： 包括新添加或替换的FMPK 130的多个FMPK 130中的高效调平。当存储控制器110在实际FMPK 130中缺少空闲块并且真实FMPK 130的任何FMPK 130和添加的替换FMPK 130被选择为调平对象设备 如果属于调平对象设备的实际FMPK 130中的块的属性为“Hot”，则属于该块的数据中大于阈值的数据被迁移到替代FMPK 130中的块; 或者如果属于调平对象装置的真实FMPK 130中的块的属性为“冷”，则属于该块的数据中小于阈值的数据被迁移到替代FMPK 130中的块。
-
2.发明授权Storage subsystem and its data processing method for reducing the amount of data to be stored in a semiconductor nonvolatile memory 有权存储子系统及其数据处理方法，用于减少存储在半导体非易失性存储器中的数据量公开(公告)号：US08359431B2
公开(公告)日：2013-01-22
申请号：US12665220
申请日：2009-08-20
申请人： Yoshiki Kano , Masanori Takada , Akira Yamamoto , Akihiko Araki , Masayuki Yamamoto , Jun Kitahara , Sadahiro Sugimoto
发明人： Yoshiki Kano , Masanori Takada , Akira Yamamoto , Akihiko Araki , Masayuki Yamamoto , Jun Kitahara , Sadahiro Sugimoto
IPC分类号： G06F13/00
CPC分类号： G06F12/0246 , G06F3/0613 , G06F3/0616 , G06F3/0659 , G06F3/0685 , G06F3/0688
摘要： The amount of data to be stored in a semiconductor nonvolatile memory can be reduced and overhead associated with data processing can be reduced. When a microprocessor 112 receives a write request from a host computer 300 and data D1 to D3 exist in a cache slot 117, the microprocessor 112 reads the LBA of each piece of the data, manages each piece of the data D1 to D3 using a bitmap table 118 by associating them with their LBAs, generates a specific command CMD based on the LBAs of the data D1 to D3, adds the data D1 to D3 and addresses ADD1 to ADD3 indicating where the data D1 to D3 are to be stored, to the specific command CMD, and sends it to an FMPK 30. The FMPK 130 stores each piece of update data in a specified block in the flash memory 135 based on the specific command CMD.
摘要翻译： 可以减少要存储在半导体非易失性存储器中的数据量，并且可以减少与数据处理相关的开销。 当微处理器112接收到来自主计算机300的写请求并且数据D1至D3存在于高速缓存槽117中时，微处理器112读取每条数据的LBA，使用位图管理每条数据D1至D3 表118通过将它们与其LBA相关联来生成基于数据D1至D3的LBA的特定命令CMD，将数据D1至D3和指示数据D1至D3将被存储在哪里的地址ADD1至ADD3添加到 特定命令CMD，并将其发送到FMPK 30.FMPK 130基于特定命令CMD将闪存135中的指定块中的每个更新数据存储在闪存135中。
-
公开(公告)号：US20110191520A1
公开(公告)日：2011-08-04
申请号：US12665220
申请日：2009-08-20
申请人： Yoshiki Kano , Masanori Takada , Akira Yamamoto , Akihiko Araki , Masayuki Yamamoto , Jun Kitahara , Sadahiro Sugimoto
发明人： Yoshiki Kano , Masanori Takada , Akira Yamamoto , Akihiko Araki , Masayuki Yamamoto , Jun Kitahara , Sadahiro Sugimoto
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F3/0613 , G06F3/0616 , G06F3/0659 , G06F3/0685 , G06F3/0688
摘要： The amount of data to be stored in a semiconductor nonvolatile memory can be reduced and overhead associated with data processing can be reduced. When a microprocessor 112 receives a write request from a host computer 300 and data D1 to D3 exist in a cache slot 117, the microprocessor 112 reads the LBA of each piece of the data, manages each piece of the data D1 to D3 using a bitmap table 118 by associating them with their LBAs, generates a specific command CMD based on the LBAs of the data D1 to D3, adds the data D1 to D3 and addresses ADD1 to ADD3 indicating where the data D1 to D3 are to be stored, to the specific command CMD, and sends it to an FMPK 30. The FMPK 130 stores each piece of update data in a specified block in the flash memory 135 based on the specific command CMD.
摘要翻译： 可以减少要存储在半导体非易失性存储器中的数据量，并且可以减少与数据处理相关的开销。 当微处理器112接收到来自主计算机300的写请求并且数据D1至D3存在于高速缓存槽117中时，微处理器112读取每条数据的LBA，使用位图管理每条数据D1至D3 表118通过将它们与其LBA相关联来生成基于数据D1至D3的LBA的特定命令CMD，将数据D1至D3和指示数据D1至D3将被存储在哪里的地址ADD1至ADD3相加到 特定命令CMD，并将其发送到FMPK 30.FMPK 130基于特定命令CMD将闪存135中的指定块中的每个更新数据存储在闪存135中。
-
4.发明授权Flash memory device for allocating physical blocks to logical blocks based on an erase count 有权闪存设备，用于根据擦除次数将物理块分配给逻辑块公开(公告)号：US08447915B2
公开(公告)日：2013-05-21
申请号：US12668755
申请日：2009-07-23
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7211
摘要： A controller in a flash memory device manages erase count of each physical block and manages the erase frequency of each logical block. The controller allocates a logical block whose erase frequency is high to one or more physical blocks whose erase count is low.
摘要翻译： 闪速存储装置中的控制器管理每个物理块的擦除计数并管理每个逻辑块的擦除频率。 控制器将擦除频率高的逻辑块分配给擦除次数较少的一个或多个物理块。
-
公开(公告)号：US08392648B2
公开(公告)日：2013-03-05
申请号：US12670241
申请日：2009-07-22
IPC分类号： G06F12/00
CPC分类号： G06F3/0631 , G06F3/0604 , G06F3/0616 , G06F3/0619 , G06F3/064 , G06F3/0647 , G06F3/0665 , G06F3/0688 , G06F3/0689 , G06F12/0246 , G06F2212/7204 , G06F2212/7208 , G11C16/349
摘要： A storage system 100, which has a plurality of flash packages 230, has a function for minimizing the imbalance of the number of deletions of each block inside the flash package 230 and a block-unit capacity virtualization function, and efficiently manifests lessening of the imbalance of the number of deletions and reduction in the data storage capacity for the entire storage system 100 by having functions for calculating the number of deletions and the data occupancy of each flash package 230, and for transferring data between the flash packages 230 on the basis of the values of these number of deletions and data occupancy.
-
公开(公告)号：US20120005402A1
公开(公告)日：2012-01-05
申请号：US12670241
申请日：2009-07-22
IPC分类号： G06F12/00
CPC分类号： G06F3/0631 , G06F3/0604 , G06F3/0616 , G06F3/0619 , G06F3/064 , G06F3/0647 , G06F3/0665 , G06F3/0688 , G06F3/0689 , G06F12/0246 , G06F2212/7204 , G06F2212/7208 , G11C16/349
摘要： A storage system 100, which has a plurality of flash packages 230, has a function for minimizing the imbalance of the number of deletions of each block inside the flash package 230 and a block-unit capacity virtualization function, and efficiently manifests lessening of the imbalance of the number of deletions and reduction in the data storage capacity for the entire storage system 100 by having functions for calculating the number of deletions and the data occupancy of each flash package 230, and for transferring data between the flash packages 230 on the basis of the values of these number of deletions and data occupancy.
摘要翻译： 具有多个闪存封装230的存储系统100具有用于最小化闪存封装230内的每个块的缺失数量的不平衡的功能和块单元容量虚拟化功能，并且有效地显示不平衡的减少 通过具有用于计算每个闪存封装230的删除次数和数据占用的功能以及用于基于闪存封装230在闪存封装230之间传送数据的功能来减少整个存储系统100的数据存储容量 这些数字的数量和数据占用的数值。
-
公开(公告)号：US08484414B2
公开(公告)日：2013-07-09
申请号：US12664721
申请日：2009-08-31
IPC分类号： G06F13/00
CPC分类号： G06F3/064 , G06F3/0616 , G06F3/0652 , G06F3/0688 , G06F11/108 , G06F2211/1035 , G11C16/3495
摘要： The storage system comprises a plurality of flash packages configuring one or more RAID groups, and a controller coupled to the plurality of flash packages. Each flash package comprises a plurality of flash chips configured from a plurality of physical blocks. The controller identifies a target area related to an unnecessary area, unmaps a physical block allocated to a logical block belonging to this target area from this logical block, and manages the unmapped physical block as a free block.
摘要翻译： 存储系统包括配置一个或多个RAID组的多个闪存包，以及耦合到多个闪存包的控制器。 每个闪存包包括由多个物理块配置的多个闪存芯片。 控制器识别与不需要的区域相关的目标区域，从该逻辑块中取消映射分配给属于该目标区域的逻辑块的物理块，并将未映射的物理块作为空闲块进行管理。
-
公开(公告)号：US20110191521A1
公开(公告)日：2011-08-04
申请号：US12668755
申请日：2009-07-23
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7211
摘要： A controller in a flash memory device manages erase count of each physical block and manages the erase frequency of each logical block. The controller allocates a logical block whose erase frequency is high to one or more physical blocks whose erase count is low.
摘要翻译： 闪速存储装置中的控制器管理每个物理块的擦除计数并管理每个逻辑块的擦除频率。 控制器将擦除频率高的逻辑块分配给擦除次数较少的一个或多个物理块。
-
公开(公告)号：US20110231594A1
公开(公告)日：2011-09-22
申请号：US12664721
申请日：2009-08-31
IPC分类号： G06F12/02
CPC分类号： G06F3/064 , G06F3/0616 , G06F3/0652 , G06F3/0688 , G06F11/108 , G06F2211/1035 , G11C16/3495
摘要： The storage system comprises a plurality of flash packages configuring one or more RAID groups, and a controller coupled to the plurality of flash packages. Each flash package comprises a plurality of flash chips configured from a plurality of physical blocks. The controller identifies a target area related to an unnecessary area, unmaps a physical block allocated to a logical block belonging to this target area from this logical block, and manages the unmapped physical block as a free block.
摘要翻译： 存储系统包括配置一个或多个RAID组的多个闪存包，以及耦合到多个闪存包的控制器。 每个闪存包包括由多个物理块配置的多个闪存芯片。 控制器识别与不需要的区域相关的目标区域，从该逻辑块中取消映射分配给属于该目标区域的逻辑块的物理块，并将未映射的物理块作为空闲块进行管理。
-
公开(公告)号：US20120191903A1
公开(公告)日：2012-07-26
申请号：US13361430
申请日：2012-01-30
申请人： Akihiko ARAKI , Yoshiki Kano , Sadahiro Sugimoto , Yusuke Nonaka
发明人： Akihiko ARAKI , Yoshiki Kano , Sadahiro Sugimoto , Yusuke Nonaka
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/1036 , G06F2212/7202 , G06F2212/7211 , G11C2211/5641
摘要： To extend endurance and reduce bit cost, a storage apparatus includes a controller and a first storage device and a second storage device having a smaller erase count upper limit than the first storage device. Area conversion information includes correspondence of a first address of a data storage destination and a second address of a data storage area The controller selects an area corresponding to the first address, determines whether a rewrite frequency of the selected area is equal to or larger than a first threshold and, when the rewrite frequency is equal to or larger than the threshold, selects an area of the first storage device, and, when the rewrite frequency is smaller than the threshold, selects an area of the second storage device and maps the address of the selected area to the first address.
摘要翻译： 为了延长耐久性并降低位成本，存储装置包括控制器和具有比第一存储装置更小的擦除次数上限的第一存储装置和第二存储装置。 区域转换信息包括数据存储目的地的第一地址和数据存储区域的第二地址的对应关系。控制器选择对应于第一地址的区域，确定所选区域的重写频率是否等于或大于 第一阈值，并且当重写频率等于或大于阈值时，选择第一存储装置的区域，并且当重写频率小于阈值时，选择第二存储装置的区域并映射地址 的所选区域到第一个地址。
-
-
-
-
-
-
-
-
-
搜索结果
47 条记录 (耗时 0.026 秒)
