Fibre channel switch system, information processing system, and login procedure
    1.
    发明申请
    Fibre channel switch system, information processing system, and login procedure 审中-公开
    光纤通道切换系统,信息处理系统和登录程序

    公开(公告)号:US20060230220A1

    公开(公告)日:2006-10-12

    申请号:US11397750

    申请日:2006-04-05

    IPC分类号: G06F13/00

    摘要: Provided is a fibre channel switch system to which a server and a storage system are connected. The fibre channel switch system includes: a host controller for controlling a fibre channel protocol, to which the server is connected; a management table for indicating a hardware address of the host controller; a switching unit for routing information of the fibre channel protocol; and a control unit for controlling the host controller and the switching unit. Accordingly, the server connected to fibre channel switch system can be downsized.

    摘要翻译: 提供了连接服务器和存储系统的光纤通道交换机系统。 光纤通道交换机系统包括:主机控制器,用于控制与服务器连接的光纤通道协议; 用于指示主机控制器的硬件地址的管理表; 用于路由光纤信道协议的信息的切换单元; 以及用于控制主机控制器和切换单元的控制单元。 因此,连接到光纤通道交换机系统的服务器可以被小型化。

    Data processing system having a channel adapter shared by multiple operating systems
    2.
    发明申请
    Data processing system having a channel adapter shared by multiple operating systems 有权
    具有由多个操作系统共享的通道适配器的数据处理系统

    公开(公告)号:US20060059328A1

    公开(公告)日:2006-03-16

    申请号:US11224965

    申请日:2005-09-14

    IPC分类号: G06F15/177

    CPC分类号: G06F12/109 G06F12/1081

    摘要: A channel adaptor is provided which can be shared by a plurality of operating systems (OS's) running in a data processing system, by generating an address translation table without changing input/output process control data. A plurality of OS's execute an input/output process for the channel adaptor by using input/output process control data having different identifiers, without sharing the input/output process control data for the channel adaptor by different OS's. The data processing system generates one virtual address translation table from a plurality of address translation tables generated by OS's, and the channel adaptor processes the input/output control data of OS's by using the virtual address translation table.

    摘要翻译: 通过在不改变输入/输出处理控制数据的情况下生成地址转换表,提供可由在数据处理系统中运行的多个操作系统(OS)共享的通道适配器。 多个OS通过使用具有不同标识符的输入/输出处理控制数据来执行用于信道适配器的输入/输出处理,而不通过不同的OS共享信道适配器的输入/输出过程控制数据。 数据处理系统从OS生成的多个地址转换表生成一个虚拟地址转换表,并且通道适配器通过使用虚拟地址转换表来处理OS的输入/输出控制数据。

    Data processing system having a channel adapter shared by multiple operating systems
    3.
    发明授权
    Data processing system having a channel adapter shared by multiple operating systems 有权
    具有由多个操作系统共享的通道适配器的数据处理系统

    公开(公告)号:US08312182B2

    公开(公告)日:2012-11-13

    申请号:US13008195

    申请日:2011-01-18

    IPC分类号: G06F13/00

    CPC分类号: G06F12/109 G06F12/1081

    摘要: Data processing arrangements including a channel adaptor shared by a plurality of operating systems (OS's) for data transmission/reception, coupled to the PCI bus on a PCI bus side of the channel adapter, and including only one connecting port on an input/output (I/O) side of the channel adaptor. An input/output process is executed between each OS and the channel adaptor by using input/output process control data specifying I/O data each having an identifier. Configuration information is provided, defining the identifier of the input/output process control data which is usable by each respective OS. The channel adaptor can process a plurality of input/output process control data; and each OS uses the input/output process control data corresponding to a usable identifier and defined in the configuration information, and thereby, a plurality of OS's control input/output process control data have different identifiers relative to the channel adaptor to execute the input/output process.

    摘要翻译: 数据处理装置包括由用于数据发送/接收的多个操作系统(OS))共享的信道适配器,其耦合到信道适配器的PCI总线侧上的PCI总线,并且仅在输入/输出(并且 I / O)侧通道适配器。 通过使用指定具有标识符的I / O数据的输入/输出处理控制数据,在每个OS和通道适配器之间执行输入/输出处理。 提供配置信息,定义可由每个相应OS使用的输入/输出过程控制数据的标识符。 信道适配器可以处理多个输入/输出过程控制数据; 并且每个OS使用与可用标识符相对应的输入/输出处理控制数据并在配置信息中定义,从而多个OS的控制输入/输出处理控制数据相对于信道适配器具有不同的标识符,以执行输入/ 输出过程。

    DATA PROCESSING SYSTEM HAVING A CHANNEL ADAPTER SHARED BY MULTIPLE OPERATING SYSTEMS
    4.
    发明申请
    DATA PROCESSING SYSTEM HAVING A CHANNEL ADAPTER SHARED BY MULTIPLE OPERATING SYSTEMS 有权
    具有多个操作系统共享的通道适配器的数据处理系统

    公开(公告)号:US20110138089A1

    公开(公告)日:2011-06-09

    申请号:US13008195

    申请日:2011-01-18

    IPC分类号: G06F13/38

    CPC分类号: G06F12/109 G06F12/1081

    摘要: A data processing system comprising a processing unit on which a control program runs, a plurality of operating systems (OS's) configured to run under control of said control program, a Peripheral Component Interchange (PCI) bus coupled to the processing unit, and a channel adaptor for data transmission/reception, wherein: the channel adaptor is coupled to the PCI bus on a PCI bus side of the channel adapter, and the channel adapter includes only one connecting port on an input/output (I/O) side of the channel adapter; an input/output process is executed between each OS and said channel adaptor by using input/output process control data specifying input/output (I/O) data each having an identifier; configuration information is provided, defining the identifier of said input/output process control data which is usable by each respective OS; said channel adaptor can process a plurality of input/output process control data; and each OS uses said input/output process control data corresponding to a usable identifier and defined in said configuration information, and thereby a plurality of OS's control input/output process control data having different identifiers relative to said channel adaptor to execute the input/output process.

    摘要翻译: 一种数据处理系统,包括控制程序运行的处理单元,被配置为在所述控制程序的控制下运行的多个操作系统(OS),耦合到所述处理单元的外围组件交换(PCI)总线,以及通道 用于数据发送/接收的适配器,其中:信道适配器耦合到信道适配器的PCI总线侧上的PCI总线,并且信道适配器仅在该信道适配器的输入/输出(I / O)侧上包括一个连接端口 通道适配器; 通过使用指定每个具有标识符的输入/输出(I / O)数据的输入/输出处理控制数据,在每个OS和所述通道适配器之间执行输入/输出处理; 提供配置信息,定义可由每个相应OS使用的所述输入/输出处理控制数据的标识符; 所述通道适配器可以处理多个输入/输出过程控制数据; 并且每个OS使用对应于可用标识符并且在所述配置信息中定义的所述输入/输出处理控制数据,从而使得具有相对于所述通道适配器具有不同标识符的多个OS的控制输入/输出处理控制数据来执行输入/输出 处理。

    Data processing system having a channel adapter shared by multiple operating systems
    5.
    发明授权
    Data processing system having a channel adapter shared by multiple operating systems 有权
    具有由多个操作系统共享的通道适配器的数据处理系统

    公开(公告)号:US07877526B2

    公开(公告)日:2011-01-25

    申请号:US12721964

    申请日:2010-03-11

    IPC分类号: G06F13/00

    CPC分类号: G06F12/109 G06F12/1081

    摘要: A data processing system including a processing unit on which a control program runs, a plurality of operating systems (OS's) configured to run under control of said control program, a Peripheral Component Interchange (PCI) bus coupled to the processing unit, and a channel adaptor for data transmission/reception, wherein: the channel adaptor is coupled to the PCI bus on a PCI bus side of the channel adapter, and the channel adapter includes only one connecting port on an input/output (I/O) side of the channel adapter; an input/output process is executed between each OS and said channel adaptor by using input/output process control data specifying input/output (I/O) data, the input/output process control data being provided via a Queue Pair having a Queue Pair identifier and including a Send Queue, Receive Queue and Complete Queue; configuration information is provided, exclusively defining the Queue Pair identifier of said Queue Pair of said input/output process control data which is usable exclusively by each respective OS; said channel adaptor can process a plurality of input/output process control data; and each OS uses said input/output process control data corresponding to a unique usable Queue Pair identifier and defined in said configuration information, and thereby a plurality of OS's control input/output process control data having different Queue Pair identifiers relative to said channel adaptor to execute the input/output process without sharing said input/output process control data for said channel adaptor by different OS's.

    摘要翻译: 一种数据处理系统,包括控制程序运行的处理单元,被配置为在所述控制程序的控制下运行的多个操作系统(OS),耦合到所述处理单元的外围组件交换(PCI)总线,以及通道 用于数据发送/接收的适配器,其中:信道适配器耦合到信道适配器的PCI总线侧上的PCI总线,并且信道适配器仅在该信道适配器的输入/输出(I / O)侧上包括一个连接端口 通道适配器; 通过使用指定输入/输出(I / O)数据的输入/输出处理控制数据,在每个OS和所述通道适配器之间执行输入/输出处理,所述输入/输出处理控制数据经由具有队列对 标识符,并包括发送队列,接收队列和完成队列; 提供配置信息,专门定义所述输入/输出过程控制数据的所述队列对的队列对标识符,其可由每个相应的OS专用地使用; 所述通道适配器可以处理多个输入/输出过程控制数据; 并且每个OS使用对应于唯一可用队列对标识符并且在所述配置信息中定义的所述输入/输出过程控制数据,从而使得具有相对于所述通道适配器的不同队列对标识符的多个OS的控制输入/输出过程控制数据 执行输入/输出过程,而不会由不同的操作系统共享所述通道适配器的所述输入/输出过程控制数据。

    DATA PROCESSING SYSTEM HAVING A CHANNEL ADAPTER SHARED BY MULTIPLE OPERATING SYSTEMS
    6.
    发明申请
    DATA PROCESSING SYSTEM HAVING A CHANNEL ADAPTER SHARED BY MULTIPLE OPERATING SYSTEMS 有权
    具有多个操作系统共享的通道适配器的数据处理系统

    公开(公告)号:US20100235548A1

    公开(公告)日:2010-09-16

    申请号:US12721964

    申请日:2010-03-11

    IPC分类号: G06F3/00

    CPC分类号: G06F12/109 G06F12/1081

    摘要: A data processing system including a processing unit on which a control program runs, a plurality of operating systems (OS's) configured to run under control of said control program, a Peripheral Component Interchange (PCI) bus coupled to the processing unit, and a channel adaptor for data transmission/reception, wherein: the channel adaptor is coupled to the PCI bus on a PCI bus side of the channel adapter, and the channel adapter includes only one connecting port on an input/output (I/O) side of the channel adapter; an input/output process is executed between each OS and said channel adaptor by using input/output process control data specifying input/output (I/O) data, the input/output process control data being provided via a Queue Pair having a Queue Pair identifier and including a Send Queue, Receive Queue and Complete Queue; configuration information is provided, exclusively defining the Queue Pair identifier of said Queue Pair of said input/output process control data which is usable exclusively by each respective OS; said channel adaptor can process a plurality of input/output process control data; and each OS uses said input/output process control data corresponding to a unique usable Queue Pair identifier and defined in said configuration information, and thereby a plurality of OS's control input/output process control data having different Queue Pair identifiers relative to said channel adaptor to execute the input/output process without sharing said input/output process control data for said channel adaptor by different OS's.

    摘要翻译: 一种数据处理系统,包括控制程序运行的处理单元,被配置为在所述控制程序的控制下运行的多个操作系统(OS),耦合到所述处理单元的外围组件交换(PCI)总线,以及通道 用于数据发送/接收的适配器,其中:信道适配器耦合到信道适配器的PCI总线侧上的PCI总线,并且信道适配器仅在该信道适配器的输入/输出(I / O)侧上包括一个连接端口 通道适配器; 通过使用指定输入/输出(I / O)数据的输入/输出处理控制数据,在每个OS和所述通道适配器之间执行输入/输出处理,所述输入/输出处理控制数据经由具有队列对 标识符并包括发送队列,接收队列和完成队列; 提供配置信息,专门定义所述输入/输出过程控制数据的所述队列对的队列对标识符,其可由每个相应的OS专用地使用; 所述通道适配器可以处理多个输入/输出过程控制数据; 并且每个OS使用对应于唯一可用队列对标识符并且在所述配置信息中定义的所述输入/输出过程控制数据,从而使得具有相对于所述通道适配器的不同队列对标识符的多个OS的控制输入/输出过程控制数据 执行输入/输出过程,而不会由不同的操作系统共享所述通道适配器的所述输入/输出过程控制数据。

    Data processing system having a channel adapter shared by multiple operating systems
    7.
    发明授权
    Data processing system having a channel adapter shared by multiple operating systems 有权
    具有由多个操作系统共享的通道适配器的数据处理系统

    公开(公告)号:US07680965B2

    公开(公告)日:2010-03-16

    申请号:US11224965

    申请日:2005-09-14

    IPC分类号: G06F3/00

    CPC分类号: G06F12/109 G06F12/1081

    摘要: A channel adaptor is provided which can be shared by a plurality of operating systems (OS's) running in a data processing system, by generating an address translation table without changing input/output process control data. A plurality of OS's execute an input/output process for the channel adaptor by using input/output process control data having different identifiers, without sharing the input/output process control data for the channel adaptor by different OS's. The data processing system generates one virtual address translation table from a plurality of address translation tables generated by OS's, and the channel adaptor processes the input/output control data of OS's by using the virtual address translation table.

    摘要翻译: 通过在不改变输入/输出处理控制数据的情况下生成地址转换表,提供可由在数据处理系统中运行的多个操作系统(OS)共享的通道适配器。 多个OS通过使用具有不同标识符的输入/输出处理控制数据来执行用于信道适配器的输入/输出处理,而不通过不同的OS共享信道适配器的输入/输出过程控制数据。 数据处理系统从OS生成的多个地址转换表生成一个虚拟地址转换表,并且通道适配器通过使用虚拟地址转换表来处理OS的输入/输出控制数据。

    Semiconductor integrated circuit device with memory blocks and a write buffer capable of storing write data from an external interface
    8.
    发明授权
    Semiconductor integrated circuit device with memory blocks and a write buffer capable of storing write data from an external interface 失效
    具有存储块的半导体集成电路器件和能够存储来自外部接口的写入数据的写入缓冲器

    公开(公告)号:US06714477B2

    公开(公告)日:2004-03-30

    申请号:US10187947

    申请日:2002-07-03

    IPC分类号: G11C800

    摘要: Read buffers (RB0-RB3) are capable of holding data read out from a plurality of memory blocks (BNK0-BNK7) that are capable of parallel operation in response to a state in which the read data cannot be externally outputted from an external interface means; and, selection means (40, 41, 42) are provided for selecting data read out from one of the memory blocks, or data read out from one of the read buffers, and for feeding it to the external interface means, while the external-output-incapable state is not present. In this way, when there is a possibility that an output of read data will cause a resource competition, this read data is stored in a read buffer, and when there is no such possibility, then the read data can be externally outputted directly, thereby improving the throughput of read data output operations.

    摘要翻译: 读取缓冲器(RB0-RB3)能够保持从能够并行操作的多个存储器块(BNK0-BNK7)中读出的数据,以响应于从外部接口装置不能从外部输出读取的数据的状态 ; 并且提供选择装置(40,41,42),用于选择从一个存储块读出的数据,或从读取缓冲器之一读出的数据,并将其馈送到外部接口装置, 输出无能力状态不存在。 这样,当读取数据的输出有可能导致资源竞争时,该读取数据被存储在读取缓冲器中,并且当不存在这种可能性时,可以直接从外部输出读取的数据,由此 提高读取数据输出操作的吞吐量。

    Semiconductor integrated circuit device with memory banks and read buffer capable of storing data read out from one memory bank when data of another memory bank is outputting
    9.
    发明授权
    Semiconductor integrated circuit device with memory banks and read buffer capable of storing data read out from one memory bank when data of another memory bank is outputting 失效
    具有存储体的半导体集成电路装置和能够在另一存储体的数据输出时存储从一个存储体读出的数据的读取缓冲器

    公开(公告)号:US06430103B2

    公开(公告)日:2002-08-06

    申请号:US09775544

    申请日:2001-02-05

    IPC分类号: G11C800

    摘要: Read buffers (RB0-RB3) are capable of holding data read out from a plurality of memory blocks (BNK0-BNK7) that are capable of parallel operation in response to a state in which the read data cannot be externally outputted from an external interface means; and, selection means (40, 41, 42) are provided for selecting data read out from one of the memory blocks, or data read out from one of the read buffers, and for feeding it to the external interface means, while the external-output-incapable state is not present. In this way, when there is a possibility that an output of read data will cause a resource competition, this read data is stored in a read buffer, and when there is no such possibility, then the read data can be externally outputted directly, thereby improving the throughput of read data output operations.

    摘要翻译: 读取缓冲器(RB0-RB3)能够保持从能够并行操作的多个存储器块(BNK0-BNK7)中读出的数据,以响应于从外部接口装置不能从外部输出读取的数据的状态 ; 并且提供选择装置(40,41,42),用于选择从一个存储块读出的数据,或从读取缓冲器之一读出的数据,并将其馈送到外部接口装置, 输出无能力状态不存在。 这样,当读取数据的输出有可能导致资源竞争时,该读取数据被存储在读取缓冲器中,并且当不存在这种可能性时,可以直接从外部输出读取的数据,由此 提高读取数据输出操作的吞吐量。