Device identifier selection
    1.
    发明授权
    Device identifier selection 有权
    设备标识符选择

    公开(公告)号:US08392614B2

    公开(公告)日:2013-03-05

    申请号:US12509832

    申请日:2009-07-27

    IPC分类号: G06F15/177 G06F15/16

    摘要: Systems and methods of device identifier selection are disclosed. In a particular embodiment, a method includes receiving an enumeration message via a host interface of a device operatively coupled to a host device as well as to one or more other devices and identifying the enumeration message as a command originated by the host device or as a response message from one of the other devices. The method includes, in response to identifying the enumeration message as a command, selectively sending an enumeration response message to the host device. The enumeration response message indicates a distinctive device identifier value. The method also includes, in response to identifying the enumeration message as a response message from one of the other devices, reading from the response message an identifier value used by such other device and at least temporarily storing this identifier value at the device to enable the device to select the distinctive device identifier value.

    摘要翻译: 公开了设备标识符选择的系统和方法。 在特定实施例中,一种方法包括经由可操作地耦合到主机设备的设备的主机接口以及一个或多个其他设备来接收枚举消息,并将该枚举消息标识为由主机设备发起的命令,或者作为 来自其他设备之一的响应消息。 该方法响应于将枚举消息标识为命令,选择性地向主机设备发送枚举响应消息。 枚举响应消息指示独特的设备标识符值。 所述方法还包括响应于从其他设备之一识别所述枚举消息作为响应消息,从所述响应消息中读取由所述其他设备使用的标识符值,并且至少在所述设备处临时存储该标识符值以使能 设备选择不同的设备标识符值。

    Host for use with dual interface card with backward and forward compatibility
    2.
    发明授权
    Host for use with dual interface card with backward and forward compatibility 有权
    主机用于具有向后兼容性的双接口卡

    公开(公告)号:US08296491B2

    公开(公告)日:2012-10-23

    申请号:US12717072

    申请日:2010-03-03

    IPC分类号: H05K7/10 G06F3/00

    CPC分类号: G06F13/409 G06F2213/3804

    摘要: Techniques are presented that allow a memory card operable according to two protocols (such as a legacy protocol and newer protocol), and having a corresponding dual interface, to be used with hosts that support the new protocol as well as having backward compatibility with legacy hosts, while preventing the use of legacy cards with hosts that support the new protocol but do not support the legacy protocol. The card that supports the new protocol has a similar form factor to the legacy card, includes an indentation. A host that supports the new, but not the legacy, type card includes a mechanical structure within the attachment slot that, based on the card indentation, can distinguish the card types and prevent the non-supported card from being attached.

    摘要翻译: 提供了允许根据两种协议(诸如传统协议和较新协议)可操作并且具有对应的双接口的存储卡以与支持新协议的主机一起使用以及具有与旧主机的向后兼容性的技术 ,同时防止使用支持新协议但不支持旧协议的主机的传统卡。 支持新协议的卡具有与传统卡相似的外形尺寸,包括缩进。 支持新的但不是旧式的卡的主机包括在附件槽内的机械结构,其基于卡缩进,可以区分卡类型并防止不支持的卡被附接。

    Dual Interface Card with Backward and Forward Compatibility
    3.
    发明申请
    Dual Interface Card with Backward and Forward Compatibility 有权
    具有向后和向前兼容性的双接口卡

    公开(公告)号:US20110189866A1

    公开(公告)日:2011-08-04

    申请号:US12676339

    申请日:2009-09-15

    IPC分类号: H01R12/51

    CPC分类号: G06F13/409 G06F2213/3804

    摘要: Techniques are presented that allow a memory card operable according to two protocols (such as a legacy protocol and newer protocol), and having a corresponding dual interface, to be used with hosts that support the new protocol as well as having backward compatibility with legacy hosts, while preventing the use of legacy cards with hosts that support the new protocol but do not support the legacy protocol. The card that supports the new protocol has a similar form factor to the legacy card, includes an indentation. A host that supports the new, but not the legacy, type card includes a mechanical structure within the attachment slot that, based on the card indentation, can distinguish the card types and prevent the non-supported card from being attached.

    摘要翻译: 提供了允许根据两种协议(诸如传统协议和较新协议)可操作并且具有对应的双接口的存储卡以与支持新协议的主机一起使用以及具有与旧主机的向后兼容性的技术 ,同时防止使用支持新协议但不支持旧协议的主机的传统卡。 支持新协议的卡具有与传统卡相似的外形尺寸,包括缩进。 支持新的但不是旧式的卡的主机包括在附件槽内的机械结构,其基于卡缩进,可以区分卡类型并防止不支持的卡被附接。

    Host for Use with Dual Interface Card with Backward and Forward Compatibility
    4.
    发明申请
    Host for Use with Dual Interface Card with Backward and Forward Compatibility 有权
    主机用于双向接口卡,具有向后和向前兼容性

    公开(公告)号:US20110040918A1

    公开(公告)日:2011-02-17

    申请号:US12717072

    申请日:2010-03-03

    IPC分类号: G06F13/00

    CPC分类号: G06F13/409 G06F2213/3804

    摘要: Techniques are presented that allow a memory card operable according to two protocols (such as a legacy protocol and newer protocol), and having a corresponding dual interface, to be used with hosts that support the new protocol as well as having backward compatibility with legacy hosts, while preventing the use of legacy cards with hosts that support the new protocol but do not support the legacy protocol. The card that supports the new protocol has a similar form factor to the legacy card, includes an indentation. A host that supports the new, but not the legacy, type card includes a mechanical structure within the attachment slot that, based on the card indentation, can distinguish the card types and prevent the non-supported card from being attached.

    摘要翻译: 提供了允许根据两种协议(诸如传统协议和较新协议)可操作并且具有对应的双接口的存储卡以与支持新协议的主机一起使用以及具有与传统主机的向后兼容性的技术 ,同时防止使用支持新协议但不支持旧协议的主机的传统卡。 支持新协议的卡具有与传统卡相似的外形尺寸,包括缩进。 支持新的但不是旧式的卡的主机包括在附件槽内的机械结构,其基于卡缩进,可以区分卡类型并防止不支持的卡被附接。

    Non-volatile memory system with self test capability
    5.
    发明授权
    Non-volatile memory system with self test capability 有权
    具有自检功能的非易失性存储系统

    公开(公告)号:US07814377B2

    公开(公告)日:2010-10-12

    申请号:US10888294

    申请日:2004-07-09

    IPC分类号: G11C29/00 G01R31/28

    CPC分类号: G06F11/267

    摘要: In a non-volatile memory system, test data may be retrieved by means of a circuit without the help of firmware. The circuit is triggered into action when it detects an abnormality in the processor or host interface. In such event, it formats the self test or status signals from the various blocks in the non-volatile memory system controller and sends a test message to the outside world without the assistance of the system processor or interface controller. When implemented in memory systems with multiple data lines, only one of the data lines may be utilized for such purpose, thereby allowing the testing to be performed while the system is still performing data transfer. Preferably, the system includes the test mode communication controller, which can select between a test channel and a host interface channel for the test message transfer so that the same testing may be performed when the memory system is in the test package as well as in an encapsulated package. The test message is transmitted repeatedly and the test message is structured so that it is easier for the receiver host to decipher the message without a handshake with the memory system. A communication controller preferably detects whether any of the communication channels is not used by the controller of a non-volatile memory system for sending signals and sends diagnostic signals through such channel.

    摘要翻译: 在非易失性存储器系统中,测试数据可以通过电路在没有固件的帮助下检索。 当它检测到处理器或主机接口中的异常时,电路被触发成动作。 在这种情况下,它会从非易失性存储器系统控制器中的各个块格式化自检或状态信号,并且在没有系统处理器或接口控制器的帮助的情况下向外界发送测试消息。 当在具有多个数据线的存储器系统中实现时,只有一条数据线可以用于此目的,从而允许在系统仍在执行数据传输时执行测试。 优选地,系统包括测试模式通信控制器,其可以在测试信道和用于测试消息传送的主机接口信道之间进行选择,使得当存储器系统处于测试包中时也可以执行相同的测试 封装包装。 测试消息被重复发送,并且测试消息被构造为使得接收者主机更容易解密消息而不与存储器系统进行握手。 通信控制器优选地检测用于发送信号的非易失性存储器系统的控制器是否没有使用任何通信信道,并且通过这样的信道发送诊断信号。

    Methods used in a nested memory system with near field communications capability
    6.
    发明申请
    Methods used in a nested memory system with near field communications capability 审中-公开
    在具有近场通信能力的嵌套存储系统中使用的方法

    公开(公告)号:US20070145135A1

    公开(公告)日:2007-06-28

    申请号:US11321833

    申请日:2005-12-28

    IPC分类号: G06K7/08 G06K19/06

    摘要: A mass storage memory card adds functionality to host devices with which it is used. In addition to the ability to store large amounts of user files and protect them from unauthorized duplication, a mass storage device according to the present invention enables near field communications with a portable electronic device that otherwise does not have such functionality. In a preferred embodiment the mass storage device has a mother/daughter configuration wherein the daughter card is a fully functioning micro-SD card that can be used independently. The mother card can be accepted in an SD card slot and communicates via the SD protocol. Whether or not the daughter card is present in the mother card, a host with the mass storage device therein will be capable of near field communications. These communications can be peer to peer or can be used to purchase goods or services as a sort of electronic wallet. A controller of the device is also operable to coordinate, control, and safeguard the financial transactions made when using the device and host as an electronic wallet.

    摘要翻译: 大容量存储存储卡为其使用的主机设备添加功能。 除了存储大量用户文件并保护它们免于未经授权的复制的能力之外,根据本发明的大容量存储设备能够实现与便携式电子设备的近场通信,否则不具有这样的功能。 在优选实施例中,大容量存储设备具有母/子配置,其中子卡是可以独立使用的完全功能的微型SD卡。 母卡可以在SD卡插槽中接受,并通过SD协议进行通信。 子卡是否存在于母卡中,其中具有大容量存储设备的主机将能够进行近场通信。 这些通信可以是对等的,也可以用来作为一种电子钱包购买商品或服务。 该设备的控制器还可操作地协调,控制和保护在使用设备和主机时作为电子钱包进行的金融交易。

    Non-volatile memory system with self test capability
    7.
    发明申请
    Non-volatile memory system with self test capability 有权
    具有自检功能的非易失性存储系统

    公开(公告)号:US20070067684A1

    公开(公告)日:2007-03-22

    申请号:US10888294

    申请日:2004-07-09

    IPC分类号: G11C29/00

    CPC分类号: G06F11/267

    摘要: In a non-volatile memory system, test data may be retrieved by means of a circuit without the help of firmware. The circuit is triggered into action when it detects an abnormality in the processor or host interface. In such event, it formats the self test or status signals from the various blocks in the non-volatile memory system controller and sends a test message to the outside world without the assistance of the system processor or interface controller. When implemented in memory systems with multiple data lines, only one of the data lines may be utilized for such purpose, thereby allowing the testing to be performed while the system is still performing data transfer. Preferably, the system includes the test mode communication controller, which can select between a test channel and a host interface channel for the test message transfer so that the same testing may be performed when the memory system is in the test package as well as in an encapsulated package. The test message is transmitted repeatedly and the test message is structured so that it is easier for the receiver host to decipher the message without a handshake with the memory system. A communication controller preferably detects whether any of the communication channels is not used by the controller of a non-volatile memory system for sending signals and sends diagnostic signals through such channel.

    摘要翻译: 在非易失性存储器系统中,测试数据可以通过电路在没有固件的帮助下检索。 当它检测到处理器或主机接口中的异常时,电路被触发成动作。 在这种情况下,它会从非易失性存储器系统控制器中的各个块格式化自检或状态信号,并且在没有系统处理器或接口控制器的帮助的情况下向外界发送测试消息。 当在具有多个数据线的存储器系统中实现时,只有一条数据线可以用于此目的,从而允许在系统仍在执行数据传输时执行测试。 优选地,系统包括测试模式通信控制器,其可以在测试信道和用于测试消息传送的主机接口信道之间进行选择,使得当存储器系统处于测试包中时也可以执行相同的测试 封装包装。 测试消息被重复发送,并且测试消息被构造为使得接收者主机更容易解密消息而不与存储器系统进行握手。 通信控制器优选地检测用于发送信号的非易失性存储器系统的控制器是否没有使用任何通信信道,并且通过这样的信道发送诊断信号。

    Optimized non-volatile storage systems
    8.
    发明申请
    Optimized non-volatile storage systems 有权
    优化的非易失性存储系统

    公开(公告)号:US20060022054A1

    公开(公告)日:2006-02-02

    申请号:US10901849

    申请日:2004-07-28

    IPC分类号: G06K19/06

    摘要: A memory card that adapts its operation according to the application to which it applied or the conditions under which it is operated. This allows the card to dynamical self optimize. In a first set of embodiments, the card uses host profiling where it will learn about the host during host-card interactions and the card's controller will optimize its algorithms accordingly. In another set of embodiments, the host and card will report to one another their capabilities for a quality of service negotiation. A further set of embodiments allows the storage device to memorize access sequences issued by the host under various predefined conditions, such as host reset or a power on boot sequence. The storage device can use this information to optimize operation for the expected commands. On deviation from an expected sequence, the device would memorize the new command sequence and save it, thus operating in a self-adaptive manner.

    摘要翻译: 一种存储卡,根据其应用的应用或操作条件来适应其操作。 这样可以让卡片进行动态自我优化。 在第一组实施例中,卡使用主机分析,其中将在主机卡交互期间了解主机,并且卡的控制器将相应地优化其算法。 在另一组实施例中,主机和卡将彼此报告其服务质量协商的能力。 另一组实施例允许存储设备在诸如主机复位或引导顺序的电源的各种预定条件下存储由主机发出的访问序列。 存储设备可以使用该信息来优化预期命令的操作。 在偏离预期序列时,设备将记忆新的命令序列并保存,从而以自适应的方式运行。

    Multiple removable non-volatile memory cards serially communicating with a host

    公开(公告)号:US06820148B1

    公开(公告)日:2004-11-16

    申请号:US09641023

    申请日:2000-08-17

    IPC分类号: G06F1300

    摘要: Two or more very small encapsulated electronic circuit cards to which data are read and written are removably inserted into two or more sockets of a host system that is wired to the sockets. According to one aspect of the disclosure, command and response signals are normally communicated between the host and the cards by a single circuit commonly connected between the host and all of the sockets but during initialization of the system a unique relative card address is confirmed to have been written into each card inserted into the sockets by connecting the command and status circuit to each socket one at a time in sequence. This is a fast and relatively simple way of setting card addresses upon initialization of such a system. According to a second aspect of the disclosure, the host adapts to transferring data between it and different cards of the system over at least two different number of the data lines commonly connected between the host and all of one or more sockets, each card permanently storing a host readable indication of the number of parallel data lines the card is capable of using. This allows increasing the rate of data transfer when the need justifies an increased card circuit complexity. According to a third aspect of the disclosure, a serial stream of data is sent over a number of data lines from one to many by alternately connecting bits of the stream to a particular number of individual lines.