Apparatus for identifying objects using radio frequency and apparatus and method for tracking position of object using the same
    1.
    发明授权
    Apparatus for identifying objects using radio frequency and apparatus and method for tracking position of object using the same 失效
    用于使用射频识别物体的设备,以及用于跟踪使用其的物体的位置的装置和方法

    公开(公告)号:US07663485B2

    公开(公告)日:2010-02-16

    申请号:US11295773

    申请日:2005-12-07

    IPC分类号: G08B13/14

    摘要: A radio frequency identification (RFID) tag based object position tracking apparatus and method are provided. The apparatus includes a position recognizer including at least one radio frequency identification unit for reading information data on an object through a sensor; and a path analyzing and processing unit for allocating each unique coordinates to the radio frequency identification units based on a relative position in a space where a position recognizer is disposed and recognizing the position of the object and analyzing the path based on the object information data received by the sensor in the radio frequency identification unit corresponding to the unique coordinate. Thus, it is possible to track the path of an object with a low density of RFID tags.

    摘要翻译: 提供了一种基于射频识别(RFID)标签的对象位置跟踪装置和方法。 该装置包括:位置识别器,包括至少一个射频识别单元,用于通过传感器读取物体上的信息数据; 以及路径分析处理单元,其基于位置识别器的空间中的相对位置,将每个唯一坐标分配给射频识别单元,并且基于接收到的对象信息数据识别对象的位置并分析路径 由传感器在射频识别单元对应的唯一坐标。 因此,可以跟踪具有低密度RFID标签的物体的路径。

    Multi-processor system and method for controlling reset and processor ID thereof
    2.
    发明授权
    Multi-processor system and method for controlling reset and processor ID thereof 失效
    多处理器系统及其控制方法及其处理器ID

    公开(公告)号:US07734903B2

    公开(公告)日:2010-06-08

    申请号:US11633811

    申请日:2006-12-05

    IPC分类号: G06F9/00

    CPC分类号: G06F15/02 G06F15/16

    摘要: Provided are a microprocessor suitable for constructing a multi-processor system and a method for controlling the reset and processor ID of the microprocessor. The microprocessor includes decoder receiving a reset ID having a predetermined binary value and a reset signal and decoding the reset ID, an ID generator receiving the decoding result of the decoder and generating at least one microprocessor ID and a reset ID of a microprocessor serially connected to the microprocessor, and a reset vector unit selecting a reset vector according to the decoding result of the decoder. The multi-processor system is constructed such that independent microprocessors of the system respectively generate their own reset vectors and processor IDs when a reset signal is input to the multi-processor system to initialize it. Thus, all the microprocessors of the system can be simultaneously started up when the reset signal is disabled. Accordingly, a resetting process in the multi-processor system is simplified, a period of time required for starting up the microprocessor is reduced, and the multi-processor system is easily designed.

    摘要翻译: 提供了适用于构造多处理器系统的微处理器和用于控制微处理器的复位和处理器ID的方法。 微处理器包括解码器,其接收具有预定二进制值的复位ID和复位信号,并对复位ID进行解码; ID生成器接收解码器的解码结果,并生成至少一个微处理器ID和与微处理器串行连接的微处理器的复位ID 微处理器和复位向量单元根据解码器的解码结果来选择复位向量。 多处理器系统被构造成使得当复位信号被输入到多处理器系统以初始化时,系统的独立微处理器分别产生它们自己的复位向量和处理器ID。 因此,当复位信号被禁止时,系统的所有微处理器都可以同时启动。 因此,简化了多处理器系统中的复位处理,减少了启动微处理器所需的时间,容易地设计多处理器系统。

    Hardware device and method for transmitting network protocol packet
    3.
    发明授权
    Hardware device and method for transmitting network protocol packet 失效
    用于传输网络协议包的硬件设备和方法

    公开(公告)号:US07818460B2

    公开(公告)日:2010-10-19

    申请号:US11949127

    申请日:2007-12-03

    IPC分类号: G06F15/16 G06F15/173

    摘要: Provided are a hardware device and method for transmitting a network protocol packet in a TOE for network protocol acceleration. The hardware device includes: a socket resource control and TCP connection/release command unit for storing socket resource control commands, and TCP connection/release commands from a host processor; a message transmission command storing unit for storing message transmission commands based on network protocol corresponding to each socket; a socket information and packet transmission information storing unit for storing socket information and packet transmission information; and a transmission-only processor for checking necessary transmission resources by interpreting message transmission commands stored in the message transmission command storing unit, processing a message to be transmitted in a form of a network packet, reading data to be transmitted, creating a header, and storing socket information and packet transmission information in the socket information and packet transmission information storing unit.

    摘要翻译: 提供了一种用于在TOE中发送网络协议分组以进行网络协议加速的硬件设备和方法。 硬件设备包括:用于存储套接字资源控制命令的套接字资源控制和TCP连接/释放命令单元,以及来自主机处理器的TCP连接/释放命令; 消息发送命令存储单元,用于基于与每个插座相对应的网络协议来存储消息传输命令; 套接字信息和分组传输信息存储单元,用于存储套接字信息和分组传输信息; 以及仅传输处理器,用于通过解释存储在消息传输命令存储单元中的消息传输命令来检查必要的传输资源,处理以网络分组的形式发送的消息,读取要发送的数据,创建报头,以及 在套接字信息和分组发送信息存储单元中存储套接字信息和分组传输信息。

    Hardware device and method for creation and management of toe-based socket information
    4.
    发明申请
    Hardware device and method for creation and management of toe-based socket information 失效
    用于创建和管理基于脚趾的套接字信息的硬件设备和方法

    公开(公告)号:US20060123123A1

    公开(公告)日:2006-06-08

    申请号:US11297127

    申请日:2005-12-07

    IPC分类号: G06F15/16

    摘要: Provided are a hardware device and a method for creating and managing socket information serving as a connection with a network protocol hierarchy in a network application program. The hardware device includes a TCP transmission processor for processing commands on requests for creating and eliminating a socket of a predetermined network program in response to the requests for creating and eliminating a socket, a TCP reception processor for creating a search signal for a corresponding socket identification when a new packet is received, a socket management unit for creating and eliminating a socket ID upon a command from the TCP transmission processor, and searching the socket ID and providing the socket ID to the TCP transmission processor upon a command from the TCP reception processor, and a memory unit for storing the socket information, and providing the socket information to the TCP reception processor.

    摘要翻译: 提供了一种用于在网络应用程序中创建和管理作为与网络协议层次结构的连接的套接字信息的硬件设备和方法。 该硬件装置包括TCP发送处理器,用于响应于创建和消除套接字的请求来处理关于创建和消除预定网络程序的套接字的请求的命令; TCP接收处理器,用于创建用于相应插座识别的搜索信号 当接收到新的分组时,一个套接字管理单元用于根据来自TCP传输处理器的命令创建并消除套接字ID,并且根据来自TCP接收处理器的命令,搜索套接字ID并向TCP发送处理器提供套接字ID 以及存储单元,用于存储套接字信息,并且向TCP接收处理器提供套接字信息。

    RETRANSMISSION AND DELAYED ACK TIMER MANAGEMENT LOGIC FOR TCP PROTOCOL
    5.
    发明申请
    RETRANSMISSION AND DELAYED ACK TIMER MANAGEMENT LOGIC FOR TCP PROTOCOL 失效
    TCP协议的延迟和延迟确认定时器管理逻辑

    公开(公告)号:US20090241001A1

    公开(公告)日:2009-09-24

    申请号:US11721213

    申请日:2005-12-06

    IPC分类号: H04L1/18 G06F11/14

    摘要: Provided is an apparatus for detection timeout of each channel, which is a socket connection, in a Transmission Control Protocol (TCP) Offload Engine (TOE) using TCP accelerating hardware, and a method thereof. The timer managing apparatus of the TOE using the TCP accelerating hardware, including: a command register for receiving a command for a retransmission timer or a delayed ACK timer from an embedded processor of the TOE; a finite state machine (FSM) for storing information of a timer in operation by analyzing the command for the retransmission timer or the delayed ACK timer stored in the command register and controlling an entire operation of the timer managing apparatus; and a timeout checker for checking timeout of a timer in operation by using the stored timer information and notifying the timeout to the FSM.

    摘要翻译: 提供了一种使用TCP加速硬件的传输控制协议(TCP)卸载引擎(TOE)中的每个信道的检测超时的装置,其是套接字连接及其方法。 使用TCP加速硬件的TOE的定时器管理装置,包括:从TOE的嵌入式处理器接收重发定时器的命令或延迟的ACK定时器的命令寄存器; 用于通过分析存储在命令寄存器中的重传定时器或延迟ACK定时器的命令来存储定时器的操作信息的有限状态机(FSM),并控制定时器管理装置的整个操作; 以及一个超时检查器,用于通过使用存储的定时器信息来检查正在运行的定时器的超时并通知超时给FSM。

    First-in first-out memory circuit and method for executing same
    6.
    发明授权
    First-in first-out memory circuit and method for executing same 有权
    先进先出的存储电路及其执行方法

    公开(公告)号:US06853588B2

    公开(公告)日:2005-02-08

    申请号:US10631763

    申请日:2003-08-01

    IPC分类号: G11C7/00 G11C8/04 G11C16/04

    CPC分类号: G11C8/04

    摘要: In a first-in first-out memory circuit using a standard cell library memory, a memory block includes N number of memories (N>1). A read pointer designates read addresses of the N number of memories. A write pointer designates write addresses of the N number of memories. A memory controller selects one from the N number of memories based on the read/write addresses, generates n number of read/write clock signals by demultiplying a clock signal by n (n=N, n>1) and sends the n number of read/write clock signals having a 1/n cycle difference to the N number of memories thereby inputting/outputting data.

    摘要翻译: 在使用标准单元库存储器的先进先出存储器电路中,存储块包括N个存储器(N> 1)。 读指针指定N个存储器的读地址。 写指针指定N个存储器的写地址。 存储器控制器基于读/写地址从N个存储器中选择一个,通过将时钟信号递减n(n = N,n> 1)来生成n个读/写时钟信号,并发送n个 对N个存储器具有1 / n个周期差的读/写时钟信号,从而输入/输出数据。

    Retransmission and delayed ACK timer management logic for TCP protocol
    7.
    发明授权
    Retransmission and delayed ACK timer management logic for TCP protocol 失效
    TCP协议的重传和延迟ACK定时器管理逻辑

    公开(公告)号:US08032809B2

    公开(公告)日:2011-10-04

    申请号:US11721213

    申请日:2005-12-06

    IPC分类号: H04L1/18

    摘要: Provided is an apparatus for detection timeout of each channel, which is a socket connection, in a Transmission Control Protocol (TCP) Offload Engine (TOE) using TCP accelerating hardware, and a method thereof. The timer managing apparatus of the TOE using the TCP accelerating hardware, including: a command register for receiving a command for a retransmission timer or a delayed ACK timer from an embedded processor of the TOE; a finite state machine (FSM) for storing information of a timer in operation by analyzing the command for the retransmission timer or the delayed ACK timer stored in the command register and controlling an entire operation of the timer managing apparatus; and a timeout checker for checking timeout of a timer in operation by using the stored timer information and notifying the timeout to the FSM.

    摘要翻译: 提供了一种使用TCP加速硬件的传输控制协议(TCP)卸载引擎(TOE)中的每个信道的检测超时的装置,其是套接字连接及其方法。 使用TCP加速硬件的TOE的定时器管理装置,包括:从TOE的嵌入式处理器接收重发定时器的命令或延迟的ACK定时器的命令寄存器; 用于通过分析存储在命令寄存器中的重传定时器或延迟ACK定时器的命令来存储定时器的操作信息的有限状态机(FSM),并控制定时器管理装置的整个操作; 以及一个超时检查器,用于通过使用存储的定时器信息来检查正在运行的定时器的超时并通知超时给FSM。

    Hardware device and method for creation and management of toe-based socket information
    8.
    发明授权
    Hardware device and method for creation and management of toe-based socket information 失效
    用于创建和管理基于脚趾的套接字信息的硬件设备和方法

    公开(公告)号:US07756961B2

    公开(公告)日:2010-07-13

    申请号:US11297127

    申请日:2005-12-07

    IPC分类号: G06F15/173

    摘要: Provided are a hardware device and a method for creating and managing socket information serving as a connection with a network protocol hierarchy in a network application program. The hardware device includes a TCP transmission processor for processing commands on requests for creating and eliminating a socket of a predetermined network program in response to the requests for creating and eliminating a socket, a TCP reception processor for creating a search signal for a corresponding socket identification when a new packet is received, a socket management unit for creating and eliminating a socket ID upon a command from the TCP transmission processor, and searching the socket ID and providing the socket ID to the TCP transmission processor upon a command from the TCP reception processor, and a memory unit for storing the socket information, and providing the socket information to the TCP reception processor.

    摘要翻译: 提供了一种用于在网络应用程序中创建和管理作为与网络协议层次结构的连接的套接字信息的硬件设备和方法。 该硬件装置包括TCP发送处理器,用于响应于创建和消除套接字的请求来处理关于创建和消除预定网络程序的套接字的请求的命令; TCP接收处理器,用于创建用于相应插座识别的搜索信号 当接收到新的分组时,一个套接字管理单元用于根据来自TCP传输处理器的命令创建并消除套接字ID,并且根据来自TCP接收处理器的命令,搜索套接字ID并向TCP发送处理器提供套接字ID 以及存储单元,用于存储套接字信息,并且向TCP接收处理器提供套接字信息。

    Rotary compressor
    9.
    发明申请
    Rotary compressor 失效
    旋转压缩机

    公开(公告)号:US20070154328A1

    公开(公告)日:2007-07-05

    申请号:US10556317

    申请日:2004-04-30

    IPC分类号: F04B49/00

    摘要: Disclosed is a rotary compressor having two compression capacities. The rotary compressor includes: a driving shaft (13) being rotatable clockwise and counterclockwise and having an eccentric portion (13a) of a predetermined size; a cylinder (21) forming a predetermined inner volume; a roller (22) installed rotatably on an outer circumference of the eccentric portion (13a) so as to contact an inner circumference of the cylinder (21), performing a rolling motion along the inner circumference and forming a fluid chamber (29) to suck and compress fluid along with the inner circumference; a vane (23) installed elastically in the cylinder (21) to contact the roller (22) continuously; upper and lower bearings (24,25) installed respectively in upper and lower portions of the cylinder (21), for supporting the driving shaft (13) rotatably and sealing the inner volume hermetically; discharge ports (26) communicating with the fluid chamber (29); suction ports (27) communicating with the fluid chamber (29) and being spaced apart from each other by a predetermined angle; and a valve assembly (110,120) for selectively opening any one of the suction ports (27) according to rotation direction of the driving shaft (13), wherein compression spaces that have different volumes from each other are formed in the fluid chamber (29) according to the rotation direction of the driving shaft (13) such that two different compression capacities are formed.

    摘要翻译: 公开了具有两个压缩容量的旋转式压缩机。 旋转压缩机包括:驱动轴(13),其可顺时针和逆时针旋转并具有预定尺寸的偏心部分(13a); 形成预定内容积的圆筒(21) 可旋转地安装在所述偏心部分(13a)的外圆周上以与所述气缸(21)的内圆周接触的辊(22),沿着所述内圆周进行滚动运动,并形成流体室(29)至 与内周一起吸入和压缩流体; 在所述气缸(21)中弹性地安装以连续地接触所述辊(22)的叶片(23) 分别安装在所述气缸(21)的上部和下部中的上部和下部轴承(24,25),用于可旋转地支撑所述驱动轴(13)并密封所述内部容积; 与流体室(29)连通的排出口(26); 与所述流体室(29)连通并且彼此隔开预定角度的吸入口(27); 以及用于根据所述驱动轴(13)的旋转方向选择性地打开任何一个所述吸入口(27)的阀组件(110,120),其中在所述流体室(29)中形成有彼此不同体积的压缩空间, 根据驱动轴(13)的旋转方向,形成两个不同的压缩能力。

    Method for converting IBIS model to SPICE behavioral model by extracting resistor and capacitor
    10.
    发明授权
    Method for converting IBIS model to SPICE behavioral model by extracting resistor and capacitor 失效
    通过提取电阻和电容将IBIS模型转换为SPICE行为模型的方法

    公开(公告)号:US07395192B2

    公开(公告)日:2008-07-01

    申请号:US11243590

    申请日:2005-10-05

    IPC分类号: G06F17/10 G06F17/50

    CPC分类号: G06F17/5036

    摘要: A method for converting an IBIS (Input/output Buffer Information Specification) model to a SPICE (Simulation Program with Integrated Circuit Emphasis) behavioral model by RC (resistor/capacitor) extraction is provided. In the method, when the SPICE behavioral models of pull-up and pull-down transistors being switching components of the output IBIS model is embodied, a resistance is extracted from voltage-current tables of the pull-up and pull-down transistors and a capacitance is extracted from voltage-time tables of the pull-up and pull-down transistors so that a static characteristic is modeled as a resistor and a dynamic characteristic is modeled as a capacitor.

    摘要翻译: 提供了一种通过RC(电阻/电容)提取将IBIS(输入/输出缓冲器信息规范)模型转换为SPICE(具有集成电路强调的仿真程序)行为模型的方法。 在该方法中,当实现了作为输出IBIS模型的开关部件的上拉和下拉晶体管的SPICE行为模型时,从上拉和下拉晶体管的电压电流表中提取电阻,并且 从上拉和下拉晶体管的电压 - 时间表中提取电容,使得静态特性被建模为电阻器,动态特性被建模为电容器。