摘要:
Disclosed is a pipelined analog-to-digital converter which includes a digital correction circuit configured to improve the complexity of a logic circuit for dividing a correction period and a no-correction period of a digital output. The pipelined analog-to-digital converter performs a logic correction operation via binary shifting at data error correction. Accordingly, although the resolution increases, it is possible to reduce the complexity and area of a logic circuit.
摘要:
Disclosed is a pipelined analog-to-digital converter which includes a digital correction circuit configured to measure and correct a pipelined conversion stage gain error and an offset error due to a finite voltage gain operational amplifier and capacitor mismatch. The pipelined analog-to-digital converter includes a pipelined conversion stage error measuring and correcting circuit measuring and correcting an error generated from an conversion stage, so that an error of a conversion stage is minimized and a chip realization area and power consumption are reduced.
摘要:
Provided is an analog digital converter (ADC). The ADC includes: a capacitor array generating a level voltage; a comparator outputting a compare signal by comparing the level voltage; and a logic circuit determining digital bits of an analog signal based on the compare signal, wherein the logic circuit determines at least one digital bit among digital bits of the analog signal while a sampling operation of the analog signal is performed in the capacitor array.
摘要:
A motor control device including a preprocessing portion calculating a counter electromotive force using an analog operation is provided. The motor control device may include an offset compensation portion and a counter electromotive force measuring portion. The offset compensation portion receives a three-phase current signal from the motor and compensates an offset of the three-phase current signal. The counter electromotive force measuring portion receives the compensated current signal and a three-phase voltage signal from the motor and calculates the received current signal and the received voltage signal using an analog operation to provide the calculated result.
摘要:
Provided is a sensorless BLDC motor system. The sensorless BLDC motor system includes a BLDC motor, a comparator, a motor controller, a three-phase inverter, and a mode selector. The BLDC motor includes first to third coils. The comparator compares a voltage of a specific coil of the first to third coils with a neutral-point voltage to output the compared result. The voltage of the specific coil becomes equal to the neutral-point voltage and a specific time elapses, and then the motor controller generates first and second coil control signals based on the compared result. The three-phase inverter supplies a source voltage or ground voltage to the specific coil, or floats the specific coil, in response to the first and second coil control signals. The mode selector selects a driving mode of the BLDC motor by adjusting the specific time.
摘要:
Disclosed is an analog-digital converter which includes a pre-amplifier configured to output a comparison result between a sampled analog input signal and a reference signal and to control a power supply operation in response to a power control signal; a digital signal processor configured to generate a digital signal based on the comparison result; a power controller configured to generate an amplifier operation clock signal for controlling the pre-amplifier; and a counter configured to count the number of falling edges of the amplifier operation clock signal and to detect a power interruption point of time of the pre-amplifier according to the counted falling edge number. The power controller generates the power control signal for interrupting a power to be supplied to the pre-amplifier when the power interruption point of time of the pre-amplifier is detected.
摘要:
Disclosed is a power control driving device which includes a sine wave signal generating unit; a control signal converting unit configured to convert a sine wave from the sine wave signal generating unit into a multi-bit control signal; and a three-phase inverter circuit configured to output a voltage varied by the multi-bit control signal from the control signal converting unit. The control signal converting unit includes a multi-bit sigma-delta modulator configured to convert an analog sine wave into a digital signal. The three-phase inverter circuit includes a plurality of switch units, on-off states of the plurality of switch units being controlled according to the multi-bit control signal from the control signal converting unit.