公开(公告)号：US07531874B2

公开(公告)日：2009-05-12

申请号：US11530705

申请日：2006-09-11

申请人： Youngwoong Son ,  Jae-Man Yoon ,  Bong-soo Kim ,  Hyeoungwon Seo

发明人： Youngwoong Son ,  Jae-Man Yoon ,  Bong-soo Kim ,  Hyeoungwon Seo

IPC分类号： H01L29/08

CPC分类号： H01L21/26513 ,  H01L21/26586 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66666 ,  H01L29/66787 ,  H01L29/7827

摘要： Field effect transistors include a substrate and a pillar that extends away from the substrate. The pillar includes a base adjacent the substrate, a top remote from the substrate, and a sidewall that extends between the base and the top. An insulated gate is provided on the sidewall. A first source/drain region is provided in the substrate beneath the pillar and adjacent the insulated gate. A second source/drain region that is heavily doped compared to the first source/drain region, is provided in the substrate beneath the pillar and remote from the insulated gate. The pillar may be an I-shaped pillar that is narrower between the base and the top compared to adjacent the base and the top, such that the sidewall includes a recessed portion between the base and the top.

摘要翻译： 场效应晶体管包括基板和远离基板延伸的支柱。 支柱包括邻近基板的基部，远离基板的顶部以及在基部和顶部之间延伸的侧壁。 在侧壁上设置绝缘门。 第一源极/漏极区域设置在柱下方的衬底中并且邻近绝缘栅极。 与第一源极/漏极区域相比重掺杂的第二源极/漏极区域设置在支柱下方的衬底中并且远离绝缘栅极。 支柱可以是与基部和顶部相邻的基部和顶部之间较窄的I形支柱，使得侧壁包括在基部和顶部之间的凹部。

公开(公告)号：US20070290258A1

公开(公告)日：2007-12-20

申请号：US11530705

申请日：2006-09-11

申请人： Youngwoong Son ,  Jae-Man Yoon ,  Bong-soo Kim ,  Hyeoungwon Seo

发明人： Youngwoong Son ,  Jae-Man Yoon ,  Bong-soo Kim ,  Hyeoungwon Seo

IPC分类号： H01L21/336

CPC分类号： H01L21/26513 ,  H01L21/26586 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66666 ,  H01L29/66787 ,  H01L29/7827

摘要： Field effect transistors include a substrate and a pillar that extends away from the substrate. The pillar includes a base adjacent the substrate, a top remote from the substrate, and a sidewall that extends between the base and the top. An insulated gate is provided on the sidewall. A first source/drain region is provided in the substrate beneath the pillar and adjacent the insulated gate. A second source/drain region that is heavily doped compared to the first source/drain region, is provided in the substrate beneath the pillar and remote from the insulated gate. The pillar may be an I-shaped pillar that is narrower between the base and the top compared to adjacent the base and the top, such that the sidewall includes a recessed portion between the base and the top.

摘要翻译： 场效应晶体管包括基板和远离基板延伸的支柱。 支柱包括邻近基板的基部，远离基板的顶部以及在基部和顶部之间延伸的侧壁。 在侧壁上设置绝缘门。 第一源极/漏极区域设置在柱下方的衬底中并且邻近绝缘栅极。 与第一源极/漏极区域相比重掺杂的第二源极/漏极区域设置在支柱下方的衬底中并且远离绝缘栅极。 支柱可以是与基部和顶部相邻的基部和顶部之间较窄的I形支柱，使得侧壁包括在基部和顶部之间的凹部。

公开(公告)号：US08558385B2

公开(公告)日：2013-10-15

申请号：US13200359

申请日：2011-09-23

申请人： Jaeman Yoon ,  Yungi Kim ,  Kangyoon Lee ,  Youngwoong Son

发明人： Jaeman Yoon ,  Yungi Kim ,  Kangyoon Lee ,  Youngwoong Son

IPC分类号： H01L23/48

CPC分类号： H01L21/76838 ,  H01L21/32139 ,  H01L21/743 ,  H01L23/522 ,  H01L27/0203 ,  H01L27/105 ,  H01L2924/0002 ,  Y10S438/942 ,  H01L2924/00

摘要： An interconnection architecture, for a semiconductor device (having regions arranged to include at least an inner region, an intermediate region located at least aside the inner region, and an outer region located at least on a side of the intermediate region opposite to the inner region, includes: one or more pairs of first and second signal lines, each pair extending from the inner region into the intermediate region; first portions and second portions of the first and second signal lines being parallel, respectively, the first portions being located in the inner region; the first and second portion of at least the first signal line not being collinear; and an intra-pair line-spacing, d(i), for each pair including the following magnitudes, d2 in the inner region, and d2′ in the intermediate region, where d2

摘要翻译： 一种互连结构，用于半导体器件（具有至少包括内部区域，至少包括内部区域的中间区域和至少位于与内部区域相对的中间区域的一侧的外部区域的区域） 包括：一对或多对第一和第二信号线，每对从内部区域延伸到中间区域;第一和第二信号线的第一部分和第二部分分别平行，第一部分位于 内部区域;至少第一信号线的第一和第二部分不是共线的;以及对于包括内部区域中的以下量值d2的每对的对内线间距d（i），以及d2' 在中间区域，其中d2

公开(公告)号：US20120013015A1

公开(公告)日：2012-01-19

申请号：US13200359

申请日：2011-09-23

申请人： Jaeman Yoon ,  Yungi Kim ,  Kangyoon Lee ,  Youngwoong Son

发明人： Jaeman Yoon ,  Yungi Kim ,  Kangyoon Lee ,  Youngwoong Son

IPC分类号： H01L23/48

CPC分类号： H01L21/76838 ,  H01L21/32139 ,  H01L21/743 ,  H01L23/522 ,  H01L27/0203 ,  H01L27/105 ,  H01L2924/0002 ,  Y10S438/942 ,  H01L2924/00

摘要： An interconnection architecture, for a semiconductor device (having regions arranged to include at least an inner region, an intermediate region located at least aside the inner region, and an outer region located at least on a side of the intermediate region opposite to the inner region, includes: one or more pairs of first and second signal lines, each pair extending from the inner region into the intermediate region; first portions and second portions of the first and second signal lines being parallel, respectively, the first portions being located in the inner region; the first and second portion of at least the first signal line not being collinear; and an intra-pair line-spacing, d(i), for each pair including the following magnitudes, d2 in the inner region, and d2′ in the intermediate region, where d2

摘要翻译： 一种互连结构，用于半导体器件（具有至少包括内部区域，至少包括内部区域的中间区域和至少位于与内部区域相对的中间区域的一侧的外部区域的区域） 包括：一对或多对第一和第二信号线，每对从内部区域延伸到中间区域;第一和第二信号线的第一部分和第二部分分别平行，第一部分位于 内部区域;至少第一信号线的第一和第二部分不是共线的;以及对于包括内部区域中的以下量值d2的每对的对内线间距d（i），以及d2' 在中间区域，其中d2

公开(公告)号：US08058169B2

公开(公告)日：2011-11-15

申请号：US11764660

申请日：2007-06-18

申请人： Jaeman Yoon ,  Yungi Kim ,  Kangyoon Lee ,  Youngwoong Son

发明人： Jaeman Yoon ,  Yungi Kim ,  Kangyoon Lee ,  Youngwoong Son

IPC分类号： H01L21/31

CPC分类号： H01L21/76838 ,  H01L21/32139 ,  H01L21/743 ,  H01L23/522 ,  H01L27/0203 ,  H01L27/105 ,  H01L2924/0002 ,  Y10S438/942 ,  H01L2924/00

摘要： An interconnection architecture, for a semiconductor device (having regions arranged to include at least an inner region, an intermediate region located at least aside the inner region, and an outer region located at least on a side of the intermediate region opposite to the inner region, includes: one or more pairs of first and second signal lines, each pair extending from the inner region into the intermediate region; first portions and second portions of the first and second signal lines being parallel, respectively, the first portions being located in the inner region; the first and second portion of at least the first signal line not being collinear; and an intra-pair line-spacing, d(i), for each pair including the following magnitudes, d2 in the inner region, and d2′ in the intermediate region, where d2

摘要翻译： 一种互连结构，用于半导体器件（具有至少包括内部区域，至少包括内部区域的中间区域和至少位于与内部区域相对的中间区域的一侧的外部区域的区域） 包括：一对或多对第一和第二信号线，每对从内部区域延伸到中间区域;第一和第二信号线的第一部分和第二部分分别平行，第一部分位于 内部区域;至少第一信号线的第一和第二部分不是共线的;以及对于包括内部区域中的以下量值d2的每对的对内线间距d（i），以及d2' 在中间区域，其中d2

公开(公告)号：US20080017997A1

公开(公告)日：2008-01-24

申请号：US11764660

申请日：2007-06-18

申请人： Jaeman Yoon ,  Yungi Kim ,  Kangyoon Lee ,  Youngwoong Son

发明人： Jaeman Yoon ,  Yungi Kim ,  Kangyoon Lee ,  Youngwoong Son

IPC分类号： H01L23/52 ,  H01L21/44

CPC分类号： H01L21/76838 ,  H01L21/32139 ,  H01L21/743 ,  H01L23/522 ,  H01L27/0203 ,  H01L27/105 ,  H01L2924/0002 ,  Y10S438/942 ,  H01L2924/00

摘要： An interconnection architecture, for a semiconductor device (having regions arranged to include at least an inner region, an intermediate region located at least aside the inner region, and an outer region located at least on a side of the intermediate region opposite to the inner region, includes: one or more pairs of first and second signal lines, each pair extending from the inner region into the intermediate region; first portions and second portions of the first and second signal lines being parallel, respectively, the first portions being located in the inner region; the first and second portion of at least the first signal line not being collinear; and an intra-pair line-spacing, d(i), for each pair including the following magnitudes, d2 in the inner region, and d2′ in the intermediate region, where d2

摘要翻译： 一种互连结构，用于半导体器件（具有至少包括内部区域，至少包括内部区域的中间区域和至少位于与内部区域相对的中间区域的一侧的外部区域的区域） 包括：一对或多对第一和第二信号线，每对从内部区域延伸到中间区域;第一和第二信号线的第一部分和第二部分分别平行，第一部分位于 内部区域;至少第一信号线的第一和第二部分不共线;以及对于包括内部区域中的以下量值d 2的每对的对内线间距d（i），以及d 2'在中间区域，其中d 2