摘要:
The present invention is directed to accurately set a frequency characteristic of a filter integrated in a semiconductor integrated circuit. A semiconductor integrated circuit includes a filter circuit, a cutoff frequency calibration circuit, and a Q-factor calibration circuit. The cutoff frequency calibration circuit adjusts cutoff frequency of the filter circuit to a desired value by adjusting capacitance components of the filter circuit. After adjustment of the cutoff frequency of the filter circuit by the cutoff frequency calibration circuit, the Q-factor calibration circuit adjusts the Q factor of the filter circuit to a desired value by adjusting a resistance component of the filter circuit.
摘要:
The disclosed invention enables the cutoff frequency of a filter to be automatically adjusted to an arbitrary setting value within the adjustment range. An automatic cutoff frequency adjusting circuit includes a voltage/current converter circuit, a charge circuit, a discharge circuit, a digital capacitance having a plurality of electrostatic capacitances, a comparator for comparing a voltage inputted to the digital capacitance with a reference voltage, and a capacitance control circuit for controlling the digital capacitance. The time until the comparator detects that the voltage inputted to the digital capacitance is higher than the reference voltage after a reset signal has become a predetermined logic level is measured, and the digital capacitance is controlled by repeating, under a predetermined condition, processing for obtaining a next setting value of the digital capacitance, based on a measurement result, a target value of the digital capacitance, and the current value of the digital capacitance.
摘要:
In a signal receiving circuit of a direct conversion system applied with a semiconductor integrated circuit for radio communication having a PLL requiring a clock signal, an LNA requiring low-noise receiving characteristics, and others, a variable coupling line is provided between clock signal buffers and at an input stage of the PLL, so that coupling between the variable coupling line and an input terminal of the LNA and coupling between the variable coupling line and a GND terminal of the LNA are made equal to each other at frequencies of higher harmonic waves of a clock signal. When the input terminal and the GND terminal of the LNA are excited at the same phase, since no output occurs at an output terminal of the LNA, an output of the LNA does not contain any higher harmonic wave of a clock signal.
摘要:
In a signal receiving circuit of a direct conversion system applied with a semiconductor integrated circuit for radio communication having a PLL requiring a clock signal, an LNA requiring low-noise receiving characteristics, and others, a variable coupling line is provided between clock signal buffers and at an input stage of the PLL, so that coupling between the variable coupling line and an input terminal of the LNA and coupling between the variable coupling line and a GND terminal of the LNA are made equal to each other at frequencies of higher harmonic waves of a clock signal. When the input terminal and the GND terminal of the LNA are excited at the same phase, since no output occurs at an output terminal of the LNA, an output of the LNA does not contain any higher harmonic wave of a clock signal.
摘要:
A receiving circuit is provided for performing reception of a plurality of band signals and suppression of blockers that remain in the plurality of band signals being received and converted in frequency. The receiving circuit includes a first low-pass filter that has a first pole position to suppress blockers remaining in a received signal by the first pole position, and a second low-pass filter that has a second pole position to suppress blockers remaining in a signal that has passed through said first low-pass filter by the second pole position. A switch that switches on/off an input-output path including the filters so that the received signal passes through said first filter without passing through the second filter when receiving a first band signal, while the received signal passes through both filters when receiving a second band signal different from the first band signal.
摘要:
The present invention is a receiving circuit used for a cellular phone that is reduced in size and can realize low power consumption. In a signal reception circuit that is used in a cellular phone that perform transmission and reception of a plurality of band wireless signals and includes a low-pass filter for removing blockers unnecessary for signal reception, the low-pass filter 104 is composed of a plurality of filters composed of a plurality of different circuit configurations and having a plurality of different pole positions, switching between a filter for blocker removal and a filter configuration with reduced sensitivity degradation is performed by combining a plurality of filters for each signal reception band, and by performing power-off of an unnecessary filter portion in the filter configuration, power consumption is reduced. By constituting a plurality of different filters using filters mutually complementing their characteristics, a redundant filter configuration can be avoided, so that the area thereof can be suppressed to necessity minimum, and cost can be reduced.
摘要:
The present invention is a receiving circuit used for a cellular phone that is reduced in size and can realize low power consumption. In a signal reception circuit that is used in a cellular phone that perform transmission and reception of a plurality of band wireless signals and includes a low-pass filter for removing blockers unnecessary for signal reception, the low-pass filter 104 is composed of a plurality of filters composed of a plurality of different circuit configurations and having a plurality of different pole positions, switching between a filter for blocker removal and a filter configuration with reduced sensitivity degradation is performed by combining a plurality of filters for each signal reception band, and by performing power-off of an unnecessary filter portion in the filter configuration, power consumption is reduced. By constituting a plurality of different filters using filters mutually complementing their characteristics, a redundant filter configuration can be avoided, so that the area thereof can be suppressed to necessity minimum, and cost can be reduced.
摘要:
There are provided a voltage-controlled oscillator and an RF-IC for W-CDMA, which are capable of ensuring a wide frequency range and improving oscillation stability. The voltage-controlled oscillator (RF-IC) includes: switching A and B inductors generating a magnetic interaction between resonant A and B inductors of a resonant circuit; and an A_NMOS, a B_NMOS, a C_NMOS, and D_NMOS as switch/load means having together a function of changing an inductance value by the magnetic interaction between the resonant A and B inductors and the switching A and B inductors and a function of serving as loads of the switching A and B inductors. The A_NMOS, the B_NMOS, the C_NMOS, and the D_NMOS are turned ON/OFF by a control signal so as to control the mutual induction, whereby the oscillation frequency is switched by changing the inductance value of the resonant circuit. Also, oscillation stability is improved by increasing the inductance value.
摘要:
In a gain switching LNA including a first transistor, a first transistor group (for example, second to ninth transistors) and a second transistor group (for example, tenth to seventeenth transistors), a first resistor connected between an emitter of the tenth transistor and a collector of the first transistor and a second resistor connected to emitters of eleventh to seventeenth transistors and the collector of the first transistor and having a resistance one seventh as high as that of the first resistor are provided. In a high-gain mode, since isolation of the tenth to seventeenth transistors which are turned OFF and the first and second to ninth transistors is secured by the first resistor and the second resistor, there is no deterioration in the noise factor.
摘要:
A quadrature mixer circuit and an RF communication semiconductor integrated circuit capable of suppressing variations in secondary distortion while reducing the current consumption are provided. In a quadrature mixer circuit, even if local signals different by 90 degrees inputted to the bases of I transistors and Q transistors have large amplitudes, interference is suppressed by I resistors, Q resistors, and capacitors. Also, since the capacitors are provided, changes in bias current values can be suppressed. Accordingly, variations in secondary distortion can be suppressed. Furthermore, the capacitors combine current outputs of a differential circuit formed of I transistors and the resistor and a differential circuit formed of Q transistors and the resistor. Therefore, current consumption can also be reduced.