公开(公告)号：US07683670B2

公开(公告)日：2010-03-23

申请号：US11421457

申请日：2006-05-31

申请人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

发明人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

IPC分类号： H03K19/0175 ,  H03K19/094

CPC分类号： H03K19/018585 ,  H03K19/0013

摘要： Embodiments that decrease power consumption of interconnecting devices in integrated circuits are disclosed. Embodiments reduce power consumption in integrated circuits by generating full and reduced swing signals at an output of a driver module in response to a control signal during and deactivating one or more elements to conserve power after an input signal remains unchanged for a period of time. Another embodiment reduces power consumption in a circuit, the embodiment comprising a swing module coupled with a swing selector and an output controller. The swing module may generate full or low swing signals depending on the state of the swing selector. The output controller may increase the output impedance of the swing module after an input signal to the swing module remains unchanged for a quantity of time. Various apparatus embodiments include portable computing devices and cellular telephones.

摘要翻译： 公开了降低集成电路中互连装置的功耗的实施例。 实施例通过在驱动器模块的输出处响应于在一个或多个元件期间的控制信号并且在输入信号保持不变一段时间之后节省功率而在驱动器模块的输出处产生完全和减小的摆动信号来降低集成电路中的功耗。 另一个实施例降低了电路中的功耗，该实施例包括与摆动选择器和输出控制器耦合的摆动模块。 摆动模块可以根据摆动选择器的状态产生满摆幅或低摆动信号。 输出控制器可以在摆动模块的输入信号保持不变一段时间之后增加摆动模块的输出阻抗。 各种设备实施例包括便携式计算设备和蜂窝电话。

公开(公告)号：US20080123458A1

公开(公告)日：2008-05-29

申请号：US11458616

申请日：2006-07-19

申请人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

发明人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

IPC分类号： G11C5/14 ,  G05F3/02

CPC分类号： G11C5/063 ,  G11C11/413

摘要： Methods and apparatuses to decrease power consumption and reduce leakage current of integrated circuits are disclosed. New leakage power saving techniques for various types of integrated circuits, including cache memory circuits, are discussed. Embodiments comprise methods and apparatuses to reduce power consumption in integrated circuits by using virtual voltage rails, or virtual power rails, to supply power to integrated circuit loads. The methods and apparatuses generally involve using one or two virtual power control devices to “head” and “foot”, or sandwich, the integrated circuit loads from firm power supply rails. In these method embodiments, one or more elements sense the voltage of the virtual power rails, or nodes, and make adjustments to control the voltage at certain “virtual” voltage potentials. While controlling the voltage in this manner, the virtual power control devices may serve to restrict unnecessary current flow through the integrated circuit loads.

摘要翻译： 公开了降低功耗并降低集成电路泄漏电流的方法和装置。 讨论了用于各种类型的集成电路（包括高速缓存存储器电路）的新的漏电省电技术。 实施例包括通过使用虚拟电压轨或虚拟电源轨来降低集成电路的功率消耗的方法和装置，以向集成电路负载供电。 所述方法和装置通常涉及使用一个或两个虚拟功率控制装置从牢固的电源轨道“集成”和“脚”或夹入集成电路负载。 在这些方法实施例中，一个或多个元件感测虚拟电源轨或节点的电压，并进行调整以控制某些“虚拟”电压电位下的电压。 在以这种方式控制电压的同时，虚拟功率控制装置可用于限制通过集成电路负载的不必要的电流。

公开(公告)号：US20070279097A1

公开(公告)日：2007-12-06

申请号：US11421457

申请日：2006-05-31

申请人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

发明人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

IPC分类号： H03K19/094

CPC分类号： H03K19/018585 ,  H03K19/0013

摘要： Methods and apparatuses to decrease power consumption of interconnecting devices in integrated circuits are disclosed. Embodiments comprise a method to reduce power consumption in integrated circuits by generating full and reduced swing signals at an output of a driver module in response to a control signal during and deactivating one or more elements to conserve power after an input signal remains unchanged for a period of time. Another embodiment comprises an apparatus to reduce power consumption in a circuit, the embodiment comprising a swing module coupled with a swing selector and an output controller. The swing module may generate full or low swing signals depending on the state of the swing selector. The output controller may increase the output impedance of the swing module after an input signal to the swing module remains unchanged for a quantity of time. Various apparatus embodiments include portable computing devices and cellular telephones.

摘要翻译： 公开了降低集成电路中互连装置的功耗的方法和装置。 实施例包括一种通过在驱动器模块的输出处响应于在一个或多个元件期间的控制信号和在激活一个或多个元件以节省功率以在输入信号保持不变一段时间之后在驱动器模块的输出处产生完全和减小的摆动信号来降低集成电路中的功耗 的时间。 另一个实施例包括一种降低电路功耗的装置，该实施例包括与摆动选择器和输出控制器耦合的摆动模块。 摆动模块可以根据摆动选择器的状态产生满摆幅或低摆动信号。 输出控制器可以在摆动模块的输入信号保持不变一段时间之后增加摆动模块的输出阻抗。 各种设备实施例包括便携式计算设备和蜂窝电话。

公开(公告)号：US07542329B2

公开(公告)日：2009-06-02

申请号：US11458616

申请日：2006-07-19

申请人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

发明人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

IPC分类号： G11C11/00

CPC分类号： G11C5/063 ,  G11C11/413

摘要： Methods and apparatuses to decrease power consumption and reduce leakage current of integrated circuits are disclosed. New leakage power saving techniques for various types of integrated circuits, including cache memory circuits, are discussed. Embodiments comprise methods and apparatuses to reduce power consumption in integrated circuits by using virtual voltage rails, or virtual power rails, to supply power to integrated circuit loads. The methods and apparatuses generally involve using one or two virtual power control devices to “head” and “foot”, or sandwich, the integrated circuit loads from firm power supply rails. In these method embodiments, one or more elements sense the voltage of the virtual power rails, or nodes, and make adjustments to control the voltage at certain “virtual” voltage potentials. While controlling the voltage in this manner, the virtual power control devices may serve to restrict unnecessary current flow through the integrated circuit loads.

摘要翻译： 公开了降低功耗并降低集成电路泄漏电流的方法和装置。 讨论了用于各种类型的集成电路（包括高速缓存存储器电路）的新的漏电省电技术。 实施例包括通过使用虚拟电压轨或虚拟电源轨来降低集成电路的功率消耗的方法和装置，以向集成电路负载供电。 所述方法和装置通常涉及使用一个或两个虚拟功率控制装置从牢固的电源轨道“集成”和“脚”或夹入集成电路负载。 在这些方法实施例中，一个或多个元件感测虚拟电源轨或节点的电压，并进行调整以控制某些“虚拟”电压电位下的电压。 在以这种方式控制电压的同时，虚拟功率控制装置可用于限制通过集成电路负载的不必要的电流。

公开(公告)号：US07366036B2

公开(公告)日：2008-04-29

申请号：US11331618

申请日：2006-01-13

申请人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

发明人： Zhibin Cheng ,  Satyajit Dutta ,  Peter J. Klim

IPC分类号： G11C5/14

CPC分类号： G11C5/147 ,  G11C5/148

摘要： A Local Dynamic Power Controller (LDPC) generates and deliver to a load a full swing voltage supply signal and a reduced swing voltage supply signal. Both the full and reduce voltage supply signals are generated from a single power supply. The full swing voltage supply signal is supplied when the load is in full operational mode whereas the reduce voltage supply signal is provided when the load is in a sleep mode. As a consequence, power dissipated in the load is reduced.

摘要翻译： 本地动态功率控制器（LDPC）产生负载全摆幅电压信号和降低的摆幅电压电源信号。 全电源和降压电源都是从单个电源产生的。 当负载处于完全工作模式时，提供全摆幅电压供应信号，而当负载处于睡眠模式时提供降压电压信号。 因此，减少了在负载中消耗的功率。

公开(公告)号：US07692976B2

公开(公告)日：2010-04-06

申请号：US11780038

申请日：2007-07-19

申请人： Zhibin B. Cheng ,  Satyajit Dutta ,  Peter J. Klim

发明人： Zhibin B. Cheng ,  Satyajit Dutta ,  Peter J. Klim

IPC分类号： G11C5/14

CPC分类号： G11C5/147 ,  G11C5/148

摘要： A Local Dynamic Power Controller (LDPC) generates and deliver to a load a full swing voltage supply signal and a reduced swing voltage supply signal. Both the full and reduce voltage supply signals are generated from a single power supply. The full swing voltage supply signal is supplied when the load is in full operational mode whereas the reduce voltage supply signal is provided when the load is in a sleep mode. As a consequence, power dissipated in the load is reduced.

摘要翻译： 本地动态功率控制器（LDPC）产生负载全摆幅电压信号和降低的摆幅电压电源信号。 全电源和降压电源都是从单个电源产生的。 当负载处于完全工作模式时，提供全摆幅电压供应信号，而当负载处于睡眠模式时提供降压电压信号。 因此，减少了在负载中消耗的功率。

公开(公告)号：US20070165462A1

公开(公告)日：2007-07-19

申请号：US11331618

申请日：2006-01-13

申请人： Zhibin Cheng ,  Satyajit Dutta ,  Peter Klim

发明人： Zhibin Cheng ,  Satyajit Dutta ,  Peter Klim

IPC分类号： G11C5/14

CPC分类号： G11C5/147 ,  G11C5/148

摘要： A Local Dynamic Power Controller (LDPC) generates and deliver to a load a full swing voltage supply signal and a reduced swing voltage supply signal. Both the full and reduce voltage supply signals are generated from a single power supply. The full swing voltage supply signal is supplied when the load is in full operational mode whereas the reduce voltage supply signal is provided when the load is in a sleep mode. As a consequence, power dissipated in the load is reduced.

摘要翻译： 本地动态功率控制器（LDPC）产生负载全摆幅电压信号和降低的摆幅电压电源信号。 全电源和降压电源都是从单个电源产生的。 当负载处于完全工作模式时，提供全摆幅电压供应信号，而当负载处于睡眠模式时提供降压电压信号。 因此，减少了在负载中消耗的功率。

公开(公告)号：US20080013395A1

公开(公告)日：2008-01-17

申请号：US11780038

申请日：2007-07-19

申请人： Zhibin Cheng ,  Satyajit Dutta ,  Peter Klim

发明人： Zhibin Cheng ,  Satyajit Dutta ,  Peter Klim

IPC分类号： G11C5/14

CPC分类号： G11C5/147 ,  G11C5/148

摘要： A Local Dynamic Power Controller (LDPC) generates and deliver to a load a full swing voltage supply signal and a reduced swing voltage supply signal. Both the full and reduce voltage supply signals are generated from a single power supply. The full swing voltage supply signal is supplied when the load is in full operational mode whereas the reduce voltage supply signal is provided when the load is in a sleep mode. As a consequence, power dissipated in the load is reduced.

摘要翻译： 本地动态功率控制器（LDPC）产生负载全摆幅电压信号和降低的摆幅电压电源信号。 全电源和降压电源都是从单个电源产生的。 当负载处于完全工作模式时，提供全摆幅电压供应信号，而当负载处于睡眠模式时提供降压电压信号。 因此，减少了在负载中消耗的功率。

公开(公告)号：US20070257731A1

公开(公告)日：2007-11-08

申请号：US11779991

申请日：2007-07-19

申请人： Zhibin Cheng ,  Satyajit Dutta ,  Peter Klim

发明人： Zhibin Cheng ,  Satyajit Dutta ,  Peter Klim

IPC分类号： G05F3/02

CPC分类号： G11C5/147 ,  G11C5/148

摘要： A Local Dynamic Power Controller (LDPC) generates and deliver to a load a full swing voltage supply signal and a reduced swing voltage supply signal. Both the full and reduce voltage supply signals are generated from a single power supply. The full swing voltage supply signal is supplied when the load is in full operational mode whereas the reduce voltage supply signal is provided when the load is in a sleep mode. As a consequence, power dissipated in the load is reduced.

摘要翻译： 本地动态功率控制器（LDPC）产生负载全摆幅电压信号和降低的摆幅电压电源信号。 全电源和降压电源都是从单个电源产生的。 当负载处于完全工作模式时，提供全摆幅电压供应信号，而当负载处于睡眠模式时提供降压电压信号。 因此，减少了在负载中消耗的功率。

公开(公告)号：US5506528A

公开(公告)日：1996-04-09

申请号：US331834

申请日：1994-10-31

申请人： Tai A. Cao ,  Satyajit Dutta ,  Byron L. Krauter ,  Thai Q. Nguyen ,  Thanh D. Trinh

发明人： Tai A. Cao ,  Satyajit Dutta ,  Byron L. Krauter ,  Thai Q. Nguyen ,  Thanh D. Trinh

IPC分类号： H01L27/092 ,  H03K19/003 ,  H03K19/0185 ,  H03K17/04 ,  H03K17/62

CPC分类号： H03K19/00361 ,  H01L27/0925 ,  H03K19/018521

摘要： A CMOS pass gate receiver improves chip-to-chip communication speed for high speed chips. The high speed CMOS pass gate receiver is immune to overshoot or undershoot and can operate in a frequency greater than or equal to 400 Mhz.

摘要翻译： CMOS通道栅极接收器提高了高速芯片的芯片间通信速度。 高速CMOS通道接收器不受超调或下冲影响，并且可以以大于或等于400Mhz的频率工作。