公开(公告)号：US08723048B2

公开(公告)日：2014-05-13

申请号：US13100687

申请日：2011-05-04

申请人： Zhonghua (Ken) Wu ,  Reza Sharifi

发明人： Zhonghua (Ken) Wu ,  Reza Sharifi

IPC分类号： H05K1/11

CPC分类号： H05K1/165 ,  H01F5/003 ,  H01F41/041 ,  H01L2224/16227 ,  H01L2924/15311 ,  H05K1/0233 ,  H05K1/0298 ,  H05K3/3436 ,  H05K2203/041 ,  Y10T29/49124

摘要： Methods, systems, and apparatuses are provided for three-dimensional coiling via structures. A substrate includes a plurality of insulating layers, a plurality of trace layers interleaved with the insulating layers, and a three-dimensional coiling via. The three-dimensional coiling via includes a plurality of electrically conductive traces and a plurality of electrically conductive vias through the insulating layers. The electrically conductive traces are present in at least two of the traces layers and are coupled together by the electrically conductive vias. The electrically conductive traces are arranged to form at least one partial turn around an axis through the substrate.

摘要翻译： 提供了通过结构进行三维卷取的方法，系统和装置。 衬底包括多个绝缘层，与绝缘层交错的多个迹线层和三维卷绕通孔。 三维卷绕通孔包括多个导电迹线和穿过绝缘层的多个导电通孔。 导电迹线存在于至少两个迹线层中，并通过导电通孔耦合在一起。 导电迹线被布置成围绕穿过基底的轴线形成至少一个部分转弯。

公开(公告)号：US20120112868A1

公开(公告)日：2012-05-10

申请号：US13100687

申请日：2011-05-04

申请人： Zhonghua (Ken) Wu ,  Reza Sharifi

发明人： Zhonghua (Ken) Wu ,  Reza Sharifi

IPC分类号： H01F5/04 ,  H05K3/00

CPC分类号： H05K1/165 ,  H01F5/003 ,  H01F41/041 ,  H01L2224/16227 ,  H01L2924/15311 ,  H05K1/0233 ,  H05K1/0298 ,  H05K3/3436 ,  H05K2203/041 ,  Y10T29/49124

摘要： Methods, systems, and apparatuses are provided for three-dimensional coiling via structures. A substrate includes a plurality of insulating layers, a plurality of trace layers interleaved with the insulating layers, and a three-dimensional coiling via. The three-dimensional coiling via includes a plurality of electrically conductive traces and a plurality of electrically conductive vias through the insulating layers. The electrically conductive traces are present in at least two of the traces layers and are coupled together by the electrically conductive vias. The electrically conductive traces are arranged to form at least one partial turn around an axis through the substrate.

摘要翻译： 提供了通过结构进行三维卷取的方法，系统和装置。 衬底包括多个绝缘层，与绝缘层交错的多个迹线层和三维卷绕通孔。 三维卷绕通孔包括多个导电迹线和穿过绝缘层的多个导电通孔。 导电迹线存在于至少两个迹线层中，并通过导电通孔耦合在一起。 导电迹线被布置成围绕穿过基底的轴线形成至少一个部分转弯。