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公开(公告)号:US09276080B2
公开(公告)日:2016-03-01
申请号:US13788503
申请日:2013-03-07
申请人: MCube, Inc.
发明人: Sudheer S. Sridharamurthy , Te-Hse Terrence Lee , Ali J. Rastegar , Mugurel Stancu , Xiao Charles Yang
CPC分类号: B81C1/00801 , B81B3/0013 , B81B3/0086 , B81B7/0022 , B81B7/0064 , B81B2203/0163 , B81B2207/094 , B81C1/00238 , B81C2201/0132 , B81C2201/05 , B81C2203/0735 , H01L27/0688
摘要: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
摘要翻译: 一种用于制造集成的MEMS-CMOS器件的方法使用微型制造工艺,其通过在CMOS的顶部上结合机械结构晶片并使用等离子体蚀刻来蚀刻机械层来实现在常规CMOS结构之上的移动机械结构(MEMS) 工艺,如深层反应离子蚀刻(DRIE)。 在蚀刻机械层期间,直接连接到机械层的CMOS器件暴露于等离子体。 这有时会导致对CMOS电路的永久性损坏,称为等离子体诱发损伤(PID)。 本发明的实施例提出了防止或减少该PID并且通过接地并为CMOS电路提供替代路径来保护下面的CMOS电路直到MEMS层被完全蚀刻的方法和结构。
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公开(公告)号:US20160176708A1
公开(公告)日:2016-06-23
申请号:US14985388
申请日:2015-12-30
申请人: mCube, Inc.
发明人: Sudheer S. Sridharamurthy , Te-Hse Terrence Lee , Ali J. Rastegar , Mugurel Stancu , Xiao Charles Yang
CPC分类号: B81C1/00801 , B81B3/0013 , B81B3/0086 , B81B7/0022 , B81B7/0064 , B81B2203/0163 , B81B2207/094 , B81C1/00238 , B81C2201/0132 , B81C2201/05 , B81C2203/0735 , H01L27/0688
摘要: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
摘要翻译: 一种用于制造集成的MEMS-CMOS器件的方法使用微型制造工艺,其通过在CMOS的顶部上结合机械结构晶片并使用等离子体蚀刻来蚀刻机械层来实现在常规CMOS结构之上的移动机械结构(MEMS) 工艺,如深层反应离子蚀刻(DRIE)。 在蚀刻机械层期间,直接连接到机械层的CMOS器件暴露于等离子体。 这有时会导致对CMOS电路的永久性损坏,称为等离子体诱发损伤(PID)。 本发明的实施例提出了防止或减少该PID并且通过接地并为CMOS电路提供替代路径来保护下面的CMOS电路直到MEMS层被完全蚀刻的方法和结构。
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公开(公告)号:US09950924B2
公开(公告)日:2018-04-24
申请号:US14985388
申请日:2015-12-30
申请人: mCube, Inc.
发明人: Sudheer S. Sridharamurthy , Te-Hse Terrence Lee , Ali J. Rastegar , Mugurel Stancu , Xiao Charles Yang
CPC分类号: B81C1/00801 , B81B3/0013 , B81B3/0086 , B81B7/0022 , B81B7/0064 , B81B2203/0163 , B81B2207/094 , B81C1/00238 , B81C2201/0132 , B81C2201/05 , B81C2203/0735 , H01L27/0688
摘要: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
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公开(公告)号:US20130236988A1
公开(公告)日:2013-09-12
申请号:US13788503
申请日:2013-03-07
申请人: MCUBE, INC.
发明人: Sudheer S. Sridharamurthy , Te-Hse Terrence Lee , Ali J. Rastegar , Mugurel Stancu , Xiao Charles Yang
IPC分类号: H01L29/66
CPC分类号: B81C1/00801 , B81B3/0013 , B81B3/0086 , B81B7/0022 , B81B7/0064 , B81B2203/0163 , B81B2207/094 , B81C1/00238 , B81C2201/0132 , B81C2201/05 , B81C2203/0735 , H01L27/0688
摘要: A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.
摘要翻译: 一种用于制造集成的MEMS-CMOS器件的方法使用微型制造工艺,其通过在CMOS的顶部上结合机械结构晶片并使用等离子体蚀刻来蚀刻机械层来实现在常规CMOS结构之上的移动机械结构(MEMS) 工艺,如深层反应离子蚀刻(DRIE)。 在蚀刻机械层期间,直接连接到机械层的CMOS器件暴露于等离子体。 这有时会导致对CMOS电路的永久性损坏,称为等离子体诱发损伤(PID)。 本发明的实施例提出了防止或减少该PID并且通过接地并为CMOS电路提供替代路径来保护下面的CMOS电路直到MEMS层被完全蚀刻的方法和结构。
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