公开(公告)号：US10715587B2

公开(公告)日：2020-07-14

申请号：US14251379

申请日：2014-04-11

Applicant: MAXELER TECHNOLOGIES LTD.

Inventor： Oliver Pell

IPC: H04L29/08 ,  G06F9/50 ,  H04L12/911

Abstract: A networked computational architecture for provisioning of virtualized computational resources. The architecture is accessible by a client application run on a client device. The architecture includes a hardware layer having a plurality of server devices, each server device having at least one physical processor having a local memory. A resource controller is provided and operable to allocate a plurality of server devices to a client application for data processing and to assign control information to the client application. The control information specifies the required allocation of a data processing workload to each server device allocated to the client application. The architecture is configured such that client applications send the data processing workload directly to each server in accordance with the control information. Thus, a networked architecture is load balanced indirectly without requiring a load balancer to be located in the data path between the client and the server.

公开(公告)号：US09514094B2

公开(公告)日：2016-12-06

申请号：US13545326

申请日：2012-07-10

Applicant: Oliver Pell ,  Itay Greenspon ,  James Barry Spooner ,  Robert Gwilym Dimond ,  Jacob Bower ,  Richard Berry

Inventor： Oliver Pell ,  Itay Greenspon ,  James Barry Spooner ,  Robert Gwilym Dimond ,  Jacob Bower ,  Richard Berry

IPC: G06F9/44 ,  G06F9/38 ,  G06F15/80

CPC classification number: G06F15/8053 ,  G06F9/3869 ,  G06F9/4494

Abstract: There is provided a method for processing multiple sets of data concurrently in a statically scheduled pipelined stream processor by allowing a data set to enter the pipeline while another data set is being processed. Dedicated logic units enable independent control of each of the data sets being processed.

Abstract translation: 提供了一种用于在静态调度的流水线流处理器中同时处理多组数据的方法，其中允许数据集进入管道，而另一数据集正在被处理。 专用逻辑单元可以对正在处理的每个数据集进行独立控制。

公开(公告)号：US09367658B2

公开(公告)日：2016-06-14

申请号：US13166565

申请日：2011-06-22

Applicant: Oliver Pell ,  James Huggett

Inventor： Oliver Pell ,  James Huggett

IPC: G06F9/44 ,  G06F17/50

CPC classification number: G06F17/505 ,  G06F2217/68

Abstract: Embodiments of the invention provide a method and apparatus for generating programmable logic for a hardware accelerator, the method comprising: generating a graph of nodes representing the programmable logic to be implemented in hardware; identifying nodes within the graph that affect external flow control of the programmable logic; retaining the identified nodes and removing or replacing all nodes which do not affect external flow control of the programmable logic in a modified graph; and simulating the modified graph or building a corresponding circuit of the retained nodes.

Abstract translation: 本发明的实施例提供了一种用于生成用于硬件加速器的可编程逻辑的方法和装置，所述方法包括：生成表示要在硬件中实现的可编程逻辑的节点图; 识别图中影响可编程逻辑的外部流量控制的节点; 保留所识别的节点，并删除或替换所有不影响修改图中可编程逻辑的外部流量控制的节点; 并模拟修改图或构建保留节点的相应电路。

公开(公告)号：US08739101B1

公开(公告)日：2014-05-27

申请号：US13683743

申请日：2012-11-21

Applicant: Maxeler Technologies Ltd.

Inventor： Robert Gwilym Dimond

IPC: G06F17/50 ,  G06F9/44 ,  G06F7/38 ,  G06F7/32 ,  G06F9/445 ,  G06F9/455 ,  G06F9/38

CPC classification number: G06F17/5054 ,  G06F7/32 ,  G06F7/38 ,  G06F9/382 ,  G06F9/4403 ,  G06F9/445 ,  G06F9/44505 ,  G06F9/455 ,  G06F17/505 ,  G06F17/5077

Abstract: A method of configuring a hardware design for a pipelined parallel stream processor includes obtaining a scheduled graph representing a processing operation in the time domain as a function of clock cycles. The graph includes a data path to be implemented in hardware as part of the stream processor, an input, an output, and parallel branches to enable data values to be streamed therethrough from the input to the output as a function of increasing clock cycle. The data path is partitioned into a plurality of discrete regions, each region operating on a different clock phase and having discrete control logic elements. Phase transition registers to align data separated by a boundary between regions having different clock phases are introduced into the data path at the boundary. The graph and control logic elements define a hardware design for the pipelined parallel stream processor.

Abstract translation: 配置流水线并行流处理器的硬件设计的方法包括获取表示时域中的处理操作的调度图，作为时钟周期的函数。 该图包括要在硬件中实现的数据路径，作为流处理器的一部分，输入，输出和并行分支，以使数据值能够作为增加时钟周期的函数从输入流输出到输出。 数据路径被划分成多个离散区域，每个区域在不同的时钟相位上操作并具有离散的控制逻辑元件。 用于对齐由具有不同时钟相位的区域之间的边界分隔的数据的相移寄存器被引入边界的数据路径。 图形和控制逻辑元素定义流水线并行流处理器的硬件设计。

公开(公告)号：US09584594B2

公开(公告)日：2017-02-28

申请号：US14251360

申请日：2014-04-11

Applicant: MAXELER TECHNOLOGIES LTD.

Inventor： Oliver Pell ,  Peter Sanders ,  Nicolas Norvez

IPC: G06F15/173 ,  H04L29/08 ,  G06F9/50

CPC classification number: H04L67/1006 ,  G06F9/4806 ,  G06F9/5005 ,  G06F9/5044 ,  G06F9/5077 ,  G06F2209/5022 ,  H04L67/1025 ,  H04L67/1036

Abstract: A system and method of dynamically provisioning virtualized computational resources in a networked computer architecture includes at least one client device operable to run one or more client applications, at least one server device and a resource controller. Each server device comprises one or more physical processors with local memory. Each server device provides a virtual resource layer through which one or more virtual processing resources can be defined and through which the physical processors of the server device can be assigned to the virtual processing resources. In use, one or more virtual processing resources is assigned to a client application for processing of data processing workloads. The resource controller then monitors the utilization of each virtual processing resource and/or any physical processor assigned to the virtual processing resource. The resource controller can dynamically adjust which, and how many, physical processors are assigned to the virtual processing resource.

Abstract translation: 在联网的计算机体系结构中动态地配置虚拟计算资源的系统和方法包括至少一个可操作以运行一个或多个客户端应用，至少一个服务器设备和资源控制器的客户端设备。 每个服务器设备包括具有本地存储器的一个或多个物理处理器。 每个服务器设备提供虚拟资源层，通过该虚拟资源层可以定义一个或多个虚拟处理资源，通过该虚拟资源层可以将服务器设备的物理处理器分配给虚拟处理资源。 在使用中，将一个或多个虚拟处理资源分配给用于处理数据处理工作负载的客户端应用程序。 资源控制器然后监视分配给虚拟处理资源的每个虚拟处理资源和/或任何物理处理器的利用率。 资源控制器可以动态地调整分配给虚拟处理资源的物理处理器和数量。

公开(公告)号：US08805914B2

公开(公告)日：2014-08-12

申请号：US12792197

申请日：2010-06-02

Applicant: Oliver Pell ,  James Huggett

Inventor： Oliver Pell ,  James Huggett

IPC: G06F7/38 ,  G06F7/00 ,  G06F15/00

CPC classification number: G06F17/10 ,  G06F7/483 ,  G06F7/4991 ,  G06F2207/3824

Abstract: There is provided a method of processing an iterative computation on a computing device comprising at least one processor. Embodiments of the method comprises performing, on a processor, an iterative calculation on data in a fixed point numerical format having a scaling factor, wherein the scaling factor is selectively variable for different steps of said calculation in order to prevent overflow and to minimize underflow. By providing such a method, the reliability, precision and flexibility of floating point operations can be achieved whilst using fixed point processing logic. The errors which fixed-point units are usually prone to generate if the range limits are exceeded can be mitigated, whilst still providing the advantage of a significantly reduced logic area to perform the calculations in fixed point.

Abstract translation: 提供了一种在包括至少一个处理器的计算设备上处理迭代计算的方法。 该方法的实施例包括在处理器上对具有缩放因子的固定点数字格式的数据执行迭代计算，其中缩放因子对于所述计算的不同步骤是有选择地变化的，以便防止溢出并且使下溢最小化。 通过提供这种方法，可以在使用定点处理逻辑的同时实现浮点运算的可靠性，精度和灵活性。 如果超出范围限制，定点单位通常容易产生的错误可以减轻，同时仍然提供显着减少的逻辑区域以在固定点执行计算的优点。

公开(公告)号：US08631380B2

公开(公告)日：2014-01-14

申请号：US13305261

申请日：2011-11-28

Applicant: Oliver Pell ,  Jacob Alexis Bower ,  Richard Berry ,  Stefan Rolf Bach ,  Oliver Kadlcek

Inventor： Oliver Pell ,  Jacob Alexis Bower ,  Richard Berry ,  Stefan Rolf Bach ,  Oliver Kadlcek

IPC: G06F17/50

CPC classification number: G06F17/505 ,  G06F2217/68

Abstract: A method of generating a hardware design for a pipelined parallel stream processor, by defining a hardware processing operation; specifying at least one propagation rule; defining a graph representing the processing operation in the time domain, comprising at least one data path to be implemented as a hardware design and a plurality of parallel branches; each data path having: at least one data path input, output, and discrete object corresponding to a hardware element; each discrete object comprises an input for receiving an input variable, an operator for executing a function on said input variable, and an output variable; optimizing each output from each discrete object in dependence upon the propagation rule to produce an optimised graph; and utilizing the optimised graph to define an optimised hardware design for implementation in said pipelined parallel stream processor.

Abstract translation: 一种通过定义硬件处理操作来生成流水线并行流处理器的硬件设计的方法; 指定至少一个传播规则; 定义表示时域中的处理操作的图，包括要被实现为硬件设计和多个并行分支的至少一个数据路径; 每个数据路径具有：与硬件元件对应的至少一个数据路径输入，输出和离散对象; 每个离散对象包括用于接收输入变量的输入，用于执行所述输入变量上的函数的运算符和输出变量; 根据传播规则优化每个离散对象的每个输出以产生优化图; 并且利用优化的图来定义用于在所述流水线并行流处理器中实现的优化的硬件设计。

公开(公告)号：US08464190B2

公开(公告)日：2013-06-11

申请号：US13029696

申请日：2011-02-17

Applicant: Jacob Alexis Bower ,  James Huggett ,  Oliver Pell

Inventor： Jacob Alexis Bower ,  James Huggett ,  Oliver Pell

IPC: G06F17/50 ,  G06F9/455

CPC classification number: G06F9/30079 ,  G06F17/5054

Abstract: There is provided embodiment of methods of and apparatus for generating a hardware design for a pipelined parallel stream processor.

Abstract translation: 提供了用于生成流水线并行流处理器的硬件设计的方法和装置的实施例。

公开(公告)号：US09501325B2

公开(公告)日：2016-11-22

申请号：US14251391

申请日：2014-04-11

Applicant: MAXELER TECHNOLOGIES LTD.

Inventor： Oliver Pell ,  Peter Sanders ,  James Barry Spooner

IPC: G06F9/50 ,  G06F9/38 ,  G06F9/455 ,  H04L12/911

CPC classification number: G06F9/5044 ,  G06F9/3877 ,  G06F9/455 ,  G06F9/5027 ,  G06F9/5077 ,  G06F2009/45595 ,  H04L47/821

Abstract: A system and method of provisioning virtualized computational resources in a networked computer architecture includes a client device to run a client application, a server device, and a resource controller. The server device includes one or more processors having a local memory, and provides a virtual resource layer through which one or more virtual processing resources can be defined and through which one or more physical processors of said server device can be assigned to one or more of said virtual processing resources. The physical processors process at least a part of a data processing workload from said one or more client applications, each workload including input data having a static data part and a dynamic data part. The resource controller assigns a virtual processing resource to a plurality of client applications, where the input data for the workload of each client application has the same static data part.

Abstract translation: 在联网计算机体系结构中提供虚拟化计算资源的系统和方法包括运行客户端应用的客户端设备，服务器设备和资源控制器。 服务器设备包括具有本地存储器的一个或多个处理器，并且提供虚拟资源层，通过该虚拟资源层可以定义一个或多个虚拟处理资源，并且通过该虚拟资源层可以将所述服务器设备的一个或多个物理处理器分配给一个或多个 说虚拟处理资源。 物理处理器处理来自所述一个或多个客户端应用的数据处理工作负载的至少一部分，每个工作负载包括具有静态数据部分和动态数据部分的输入数据。 资源控制器将虚拟处理资源分配给多个客户端应用，其中每个客户端应用的工作负荷的输入数据具有相同的静态数据部分。

公开(公告)号：US20150296002A1

公开(公告)日：2015-10-15

申请号：US14251379

申请日：2014-04-11

Applicant: MAXELER TECHNOLOGIES LTD.

Inventor： Oliver Pell

IPC: H04L29/08 ,  H04L12/911

Abstract: A networked computational architecture for provisioning of virtualized computational resources. The architecture is accessible by a client application run on a client device. The architecture includes a hardware layer having a plurality of server devices, each server device having at least one physical processor having a local memory. A resource controller is provided and operable to allocate a plurality of server devices to a client application for data processing and to assign control information to the client application. The control information specifies the required allocation of a data processing workload to each server device allocated to the client application. The architecture is configured such that client applications send the data processing workload directly to each server in accordance with the control information. Thus, a networked architecture is load balanced indirectly without requiring a load balancer to be located in the data path between the client and the server.

Abstract translation: 用于提供虚拟化计算资源的联网计算架构。 该架构可以由客户端设备上运行的客户端应用程序访问。 该架构包括具有多个服务器设备的硬件层，每个服务器设备具有至少一个具有本地存储器的物理处理器。 提供资源控制器并且可操作以将多个服务器设备分配给用于数据处理的客户端应用，并且向客户端应用分配控制信息。 控制信息指定将数据处理工作负载分配给分配给客户端应用程序的每个服务器设备所需的分配。 该架构被配置为使得客户端应用程序根据控制信息将数据处理工作负载直接发送到每个服务器。 因此，网络架构间接负载均衡，而不需要将负载均衡器放置在客户端和服务器之间的数据路径中。