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公开(公告)号:US11942546B2
公开(公告)日:2024-03-26
申请号:US17110536
申请日:2020-12-03
申请人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. , NATIONAL TAIWAN UNIVERSITY , National Taiwan Normal University
发明人: Kuan-Ting Chen , Shu-Tong Chang , Min-Hung Lee
CPC分类号: H01L29/78391 , H01L21/02181 , H01L21/02189 , H01L21/02205 , H01L21/0228 , H01L29/6684
摘要: A method includes forming an interfacial layer over a substrate; forming a quasi-antiferroelectric (QAFE) layer over the interfacial layer, in which forming the QAFE layer comprises performing an atomic layer deposition (ALD) cycle, and the ALD cycle includes performing a first sub-cycle for X time(s), in which the first sub-cycle comprises providing a Zr-containing precursor; performing a second sub-cycle for Y time(s), in which the second sub-cycle comprises providing a Hf-containing precursor; and performing a third sub-cycle for Z time(s), in which the third sub-cycle comprises providing a Zr-containing precursor, and in which X+Z is at least three times Y; and forming a gate electrode over the QAFE layer.
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公开(公告)号:US20230422515A1
公开(公告)日:2023-12-28
申请号:US17848806
申请日:2022-06-24
申请人: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. , NATIONAL TAIWAN UNIVERSITY , National Taiwan Normal University
发明人: Kuo-Yu HSIANG , Chun-Yu LIAO , Jen-Ho LIU , Min-Hung LEE
IPC分类号: H01L27/11507
CPC分类号: H01L27/11507
摘要: An integrated circuit device includes a substrate and a memory device. The memory device is over the substrate. The memory device includes a bottom electrode, a dielectric layer, an antiferroelectric layer, and a top electrode. The dielectric layer is over the bottom electrode. The antiferroelectric layer is over the dielectric layer. The top electrode is over the antiferroelectric layer.
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公开(公告)号:US20220207200A1
公开(公告)日:2022-06-30
申请号:US17565941
申请日:2021-12-30
发明人: Chun-Yen CHANG , Ping-Han CHENG
IPC分类号: G06F30/12
摘要: The invention discloses a computer aided design system and method for an educational table game. A plurality of predetermined objects, a plurality of predetermined hierarchical subjects, a plurality of predetermined learning contents, a plurality of predetermined game rule templates, a plurality of predetermined game scene templates, and a plurality of predetermined game accessory templates are previously provided. For the educational table games, a selected object is selected from the predetermined objects is selected, and a selected hierarchical subject is selected from the predetermined hierarchical subjects. Then, at least one selected learning content is selected. Next, a set game rule is set. Afterward, a set game scene is set. Then, a set game accessory package file is set. Finally, a game plan file is generated, and the game plan file and the set game accessory package file are output.
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公开(公告)号:US20220186204A1
公开(公告)日:2022-06-16
申请号:US17206944
申请日:2021-03-19
发明人: Guan-Chiun LEE
摘要: Provided is an immobilized thermostable trehalose synthase including an amino acid sequence of a trehalose synthase domain and an amino acid sequence of a cellulose binding domain. Also provided is a method for converting maltose into trehalose or for converting sucrose into trehalulose by using the immobilized thermostable trehalose synthase.
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公开(公告)号:US20220176306A1
公开(公告)日:2022-06-09
申请号:US17365469
申请日:2021-07-01
发明人: Chia-Jung LU , Chih-Chieh Fan
摘要: A planar separation component for gas chromatograph includes a substrate made of aluminum, a porous anodic aluminum oxide separation member, and a cover unit. The substrate has a planar body, and a first flow channel having a first inlet and a first outlet. The separation member is formed on the substrate, and has a channel-defining wall defining the first flow channel and a plurality of nanosized pores in spatial communication with the first flow channel. The cover unit is bonded to the planar body for covering the first flow channel. Methods for manufacturing the planar separation component and separating a mixture containing compounds different in boiling point using the planar separation component are also disclosed.
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公开(公告)号:US11332120B2
公开(公告)日:2022-05-17
申请号:US16802044
申请日:2020-02-26
发明人: Yi-Hsuan Hung , Syuan-Yi Chen , Kai-Lin Lee , Po-Lin Shih , Tzu-Cheng Chou , Wei-Gang Chen
IPC分类号: B60W20/15 , B60L15/20 , B60W10/26 , B60W10/06 , B60L58/14 , B60L50/75 , B60W20/11 , B60W50/00
摘要: A method of energy management includes steps of: deciding system parameters; determining an object function; obtaining characteristics information and predetermined ranges respectively of the system parameters; calculating function values of the object function for various parameter value combinations of the system parameters within the predetermined ranges based on the characteristics information so as to establish a database; determining a smallest function value among those of the function values in the database that satisfy certain conditions; and determining an optimum power split ratio based on the parameter value combination corresponding to the smallest function value for energy management of the vehicle.
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公开(公告)号:US11245024B2
公开(公告)日:2022-02-08
申请号:US16844809
申请日:2020-04-09
申请人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. , NATIONAL TAIWAN UNIVERSITY , NATIONAL TAIWAN NORMAL UNIVERSITY
发明人: Tung-Ying Lee , Tse-An Chen , Tzu-Chung Wang , Miin-Jang Chen , Yu-Tung Yin , Meng-Chien Yang
IPC分类号: H01L21/28 , H01L29/49 , H01L29/51 , H01L29/78 , H01L29/66 , H01L29/786 , H01L29/06 , H01L29/423 , H01L21/02
摘要: A method of manufacturing a semiconductor device includes forming a fin structure comprising alternately stacked first semiconductor layers and second semiconductor layers over a substrate. A sacrificial gate structure is formed over the fin structure. Spacers are formed on either side of the sacrificial gate structure. The sacrificial gate structure is removed to form a trench between the spacers. The first semiconductor layers are removed from the trench, while leaving the second semiconductor layers suspended in the trench. A self-assembling monolayer is formed on sidewalls of the spacers in the trench. Interfacial layers are formed encircling the suspended second semiconductor layers, respectively. A high-k dielectric layer is deposited at a faster deposition rate on the interfacial layers than on the self-assembling monolayer. A metal gate structure is formed over the high-k dielectric layer.
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公开(公告)号:US20210146422A1
公开(公告)日:2021-05-20
申请号:US16746516
申请日:2020-01-17
发明人: Shun-Tong CHEN , Chao-Rong Chiang , Chien-Ta Huang
摘要: An electromagnetic stamping apparatus includes a work platform configured to load a work piece. A stamping component is coupled to the work platform and has a first position and a second position. The stamping component includes a stamping rod and a stamping head. The stamping head stamps the work piece on the first position. An electromagnetic device is coupled to the stamping rod and generates a magnetic force according to an alternating current to push the stamping component to the first position to make the stamping component stamp the work piece. A compression spring pushes the stamping component to the second position according to the restoring force of the compression spring. Wherein, the magnetic force is greater than the restoring force of the compression spring to make the stamping component stamp the work piece twice in every waveform period of the alternating current.
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公开(公告)号:US10976152B2
公开(公告)日:2021-04-13
申请号:US15590706
申请日:2017-05-09
发明人: Chau-Jern Cheng , Chin-Yu Liu , Xin-Ji Lai
摘要: A method for defect inspection of a transparent substrate comprises (a) providing an optical system for performing a diffraction process of object wave passing through a transparent substrate, (b) interfering and wavefront recording for the diffracted object wave and a reference wave to reconstruct the defect complex images (including amplitude and phase) of the transparent substrate, (c) characteristics analyzing, features classifying and sieving for the defect complex images of the transparent substrate, and (d) creating defect complex images database based-on the defect complex images for comparison and detection of the defect complex images of the transparent substrate.
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公开(公告)号:US20210005733A1
公开(公告)日:2021-01-07
申请号:US16676669
申请日:2019-11-07
发明人: Chun-Hu CHENG
IPC分类号: H01L29/51 , H01L29/423 , H01L29/78 , H01L27/11597
摘要: A storage memory device includes a vertical field effect transistor including a semiconductor substrate; a pillar extending upwardly from the substrate and containing a source, a drain, and a channel disposed therebetween; a first insulating layer surrounding the channel; a stacked structure surrounding the first insulating layer; and a gate unit. The stacked structure includes a charge trapping layer and a composite element. The composite element includes a ferroelectric layer made of a doped hafnium oxide-based material that has a predominantly orthorhombic phase and exhibits a negative capacitance; and an antiferroelectric layer made of a zirconium oxide-based material that has a predominantly tetragonal phase.
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