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公开(公告)号：US20250167733A1
公开(公告)日：2025-05-22
申请号：US18943506
申请日：2024-11-11
Applicant: STMicroelectronics International N.V.
Inventor： Michel AYRAUD , Fernando Jose RAMALHO TEIXEIRA, JR.
IPC: H03B5/36
Abstract: The present description concerns an electronic oscillator comprising a resonator coupled in parallel to at least one active circuit, the resonator comprising two electrodes coupled to separate variable capacitive elements forming a charge capacitive element of the electronic oscillator, and a control device configured to independently control the values of the variable capacitive elements.
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公开(公告)号：US20250165428A1
公开(公告)日：2025-05-22
申请号：US18513885
申请日：2023-11-20
Applicant: STMicroelectronics International N.V.
Inventor： Eyuel Zewdu TEFERI
IPC: G06F13/42
Abstract: A process for a slave device on a serial data bus to make an in-band interrupt request to a master device includes checking whether a backoff time stored by a backoff timer has expired. When the backoff time has not expired, the slave device refrains from initiating the in-band interrupt request to the master device in response to a start condition on the serial bus. However, when the backoff time has expired, the slave device is permitted to initiate the in-band interrupt request to the master device in response to the start condition on the serial bus.
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公开(公告)号：US20250160214A1
公开(公告)日：2025-05-15
申请号：US18943113
申请日：2024-11-11
Applicant: STMicroelectronics International N.V.
Inventor： Antonio BELLIZZI , Fabrizio CREVENNA
IPC: H10N10/01
Abstract: A thermoelectric unit includes a thermoelectric membrane having a first surface at a cavity in a layer of first thermally conductive material. The thermoelectric membrane has a second surface opposite to the first surface with second thermally conductive material arranged in contact with the second surface of the thermoelectric membrane. The thermoelectric membrane includes thermally sensitive material configured to generate via the Seebeck effect a thermoelectric signal indicative of the temperature difference between the second thermally conductive material and the first thermally conductive material. An insulating molding compound is molded onto the second thermally conductive material arranged in contact with the second surface of the thermoelectric membrane wherein mechanical stress develops in the thermoelectric membrane in response to molding. An encapsulation is provided at the second surface of the thermoelectric membrane. The encapsulation counters mechanical stress developed in the thermoelectric membrane in response to the molding of insulating molding compound.
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公开(公告)号：US20250155640A1
公开(公告)日：2025-05-15
申请号：US18922884
申请日：2024-10-22
Applicant: STMicroelectronics International N.V.
Inventor： Sébastien Cremer , Frédéric Boeuf
IPC: G02B6/13
Abstract: A method of manufacturing a photonic device comprises, successively, forming on a first substrate at least one metallization level and a first bonding layer, forming on a second high-resistivity substrate a second bonding layer, bonding the first bonding layer to the second bonding layer, removing the first substrate; and forming a first optical component on the at least one metallization level. A sum of the thicknesses of the first and second bonding layers and of the thickness of the at least one metallization level is greater than 3 μm.
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公开(公告)号：US12302625B2
公开(公告)日：2025-05-13
申请号：US17709080
申请日：2022-03-30
Inventor： Matthieu Nongaillard , Thomas Oheix
Abstract: The disclosure concerns an electronic device provided with two high electron mobility transistors stacked on each other and having in common their source, drain, and gate electrodes. For example, each of these electrodes extends perpendicularly to the two transistors. For example, the source and drain electrodes electrically contact the conduction channels of each of the transistors so that said channels are electrically connected in parallel.
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Patent Agency Ranking
公开(公告)号：US12299214B2
公开(公告)日：2025-05-13
申请号：US18447147
申请日：2023-08-09
Applicant: STMicroelectronics International N.V.
Inventor： Stefano Paolo Rivolta , Federico Rizzardini , Lorenzo Bracco
IPC: G06F3/01 , G06F3/0346
Abstract: The present disclosure is directed to lift-up gesture detection for electronic devices. An initial lift-up gesture is detected in response to an orientation change and a lift-up motion of the device being detected. The initial lift-up gesture is validated as a true lift-up gesture in a case where a shaking motion of the device is not being detected when the initial lift-up gesture is detected. If a shaking motion of the device is detected when the initial lift-up gesture is detected, the initial lift-up gesture is rejected.
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公开(公告)号：US20250150811A1
公开(公告)日：2025-05-08
申请号：US18935075
申请日：2024-11-01
Applicant: STMicroelectronics International N.V.
Inventor： Julien SAADE
Abstract: At least one transmission of scrambled data with a pseudo-random sequence generated by a scrambling polynomial and an initialization value is performed between a transmitter and a receiver. Prior to the transmission, transmitter and the receiver engage in a secret negotiation phase to specifically determine the scrambling polynomial and the initialization value for the at least one transmission.
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公开(公告)号：US20250149993A1
公开(公告)日：2025-05-08
申请号：US18386949
申请日：2023-11-03
Applicant: STMicroelectronics International N.V.
Inventor： Claudio Adragna
Abstract: According to an embodiment, a converter includes a bootstrap capacitor, a high-side switch, a low-side switch, an auxiliary switch, and a controller. The bootstrap capacitor has a first terminal coupled to a floating ground node. The high-side switch has a source terminal coupled to the bootstrap capacitor through the floating ground node. The auxiliary switch has a drain terminal coupled to the bootstrap capacitor through the floating ground node. The controller provides a first control signal to a control terminal of the high-side switch, provides a second control signal to a control terminal of the low-side switch, and provides a third control signal to a control terminal of the auxiliary switch. The third control signal is based on a condition associated with the converter after the first control signal and the second control signal deactivate the high-side switch and the low-side switch respectively.
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公开(公告)号：US12294358B2
公开(公告)日：2025-05-06
申请号：US18409083
申请日：2024-01-10
Applicant: STMicroelectronics International N.V.
Inventor： Riccardo Condorelli , Antonino Mondello , Michele Alessandro Carrano , Daniele Mangano , Fabien Laplace , Luc Garcia , Michel Cuenca
Abstract: A resettable digital stage operates when a supply voltage is higher than a threshold. A non-volatile memory stores a digital code read by a reading stage. A main power-on reset circuit generates a main reset signal controlling reset of the reading stage. A resettable volatile memory coupled to the reading stage stores a default value when reset. An auxiliary power-on reset circuit generates an auxiliary reset signal controlling reset of the volatile memory. Upon deactivation of the reset, the reading stage loads the digital code into the volatile memory. The main power-on reset circuit functions in a non-trimmed configuration response to the stored default value and in a trimmed configuration responsive to the stored digital code. The main power-on reset circuit has first and second operative thresholds which respectively fall within a first and second non-trimmed voltage range or within a first and second trimmed voltage range.
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公开(公告)号：US12293981B2
公开(公告)日：2025-05-06
申请号：US17733589
申请日：2022-04-29
Inventor： Stephane Monfray , Siddhartha Dhar , Alain Fleury
Abstract: The present disclosure relates to an electronic circuit comprising a semiconductor substrate, radiofrequency switches corresponding to MOS transistors comprising doped semiconductor regions in the substrate, at least two metallization levels covering the substrate, each metallization level comprising a stack of insulating layers, conductive pillars topped by metallic tracks, at least two connection elements each connecting one of the doped semiconductor regions and formed by conductive pillars and conductive tracks of each metallization level. The electronic circuit further comprises, between the two connection elements, a trench crossing completely the stack of insulating layers of one metallization level and further crossing partially the stack of insulating layers of the metallization level the closest to the substrate, and a heat dissipation device adapted for dissipating heat out of the trench.
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