公开(公告)号：US06175316B1

公开(公告)日：2001-01-16

申请号：US09287263

申请日：1999-04-07

申请人： Maged F. Barsoum ,  Hungming Chang ,  Eugen Gershon ,  Chien-Meen Hwang ,  Muoi V. Huynh

发明人： Maged F. Barsoum ,  Hungming Chang ,  Eugen Gershon ,  Chien-Meen Hwang ,  Muoi V. Huynh

IPC分类号： H03M510

CPC分类号： H04L27/2602 ,  H03M5/10

摘要： A discrete multi-tone communication system employing bin-to-bin differential encoding of data frames to be transmitted within the communication system. The bin-to-bin differential encoding utilizes the phase angle of previously encoded data to encode the current data relative to that phase angle. Hence, only a single reference tone is required to encode a first portion of the data frame into a discrete tone, and then the remaining data portions of the data frame are each subsequently encoded into discrete tones with reference to the phase angle of data already encoded into a discrete tone. Thus, to achieve decoding, a decoding device only requires the reference tone to begin decoding the discrete tones to the correct phase angle for an accurate reproduction of the original data frame.

摘要翻译： 一种离散的多音通信系统，采用在通信系统内发送的数据帧的二进制差分编码。 bin到bin的差分编码利用先前编码的数据的相位角来相对于该相位角对当前数据进行编码。 因此，仅需要单个参考音来将数据帧的第一部分编码成离散音调，然后参考已经编码的数据的相位角，数据帧的剩余数据部分随后被编码成离散音调 变成离散的音调。 因此，为了实现解码，解码装置仅需要参考音开始将离散音调解码为正确的相位角，以准确再现原始数据帧。

公开(公告)号：US09236874B1

公开(公告)日：2016-01-12

申请号：US14336934

申请日：2014-07-21

申请人： Audience, Inc.

发明人： David P. Rossum

IPC分类号： H03M5/06 ,  H03M1/00 ,  H03M5/00 ,  H03M9/00

CPC分类号： H03M5/145 ,  H03M5/10 ,  H03M9/00

摘要： Provided are methods and systems for reducing a transition rate in transmitting data between analog and digital chips in Sigma-Delta Modulator (SDM) based Digital to Analog Converters (DACs) and Analog to Digital Converters (ADCs) intended to be used in audio signal processing. An example method may comprise receiving, by a digital chip, SDM binary data, mapping the SDM binary data to transition binary codes, and transmitting the transition binary codes to an analog chip. The mapping can be carried out according to a principle that the more commonly used SDM binary data codes correspond to transition binary data codes that require that fewer transitions occur in the signals between the chips. The methods and systems described provide for lowering the power needed for carrying out the data transmission between digital and analog chips.

摘要翻译： 提供了用于减少在用于音频信号处理的基于Σ-Δ调制器（SDM）的数模转换器（DAC）和模数转换器（DAC）中的模拟和数字芯片之间传输数据的转换速率的方法和系统 。 示例性方法可以包括通过数字芯片接收SDM二进制数据，将SDM二进制数据映射到转换二进制码，并将转换二进制码发送到模拟芯片。 可以根据以下原则执行映射：更常用的SDM二进制数据代码对应于需要在芯片之间的信号中发生较少转换的转换二进制数据代码的原理。 所描述的方法和系统提供了降低在数字和模拟芯片之间进行数据传输所需的功率。

公开(公告)号：US6107945A

公开(公告)日：2000-08-22

申请号：US97786

申请日：1998-06-15

申请人： Louis Joseph Shrinkle

发明人： Louis Joseph Shrinkle

IPC分类号： H03M5/10

CPC分类号： H03M5/10

摘要： A data capture circuit includes a character detection circuit and a word detection circuit. The character detection circuit determines values for characters represented by a signal having a frequency. In making such determinations, the values for characters are based on an accumulation of differential samples of the signal. The word detection circuit is coupled to receive the values for characters from the character detection circuit. The word detection circuit determines a word value based on the received values for characters. The word detection circuit includes a comparison circuit and an accumulator. The comparison circuit compares a value for a character in a word to a to a value for at least one other character in the word and provides a character value based on the comparison. The accumulator has an input coupled to receive character values from the comparison circuit and an output to provide a summation of character values received by the accumulator.

摘要翻译： 数据采集​​电路包括字符检测电路和字检测电路。 字符检测电路确定由具有频率的信号表示的字符的值。 在进行这样的确定时，字符的值基于信号的差分采样的累加。 字检测电路被耦合以从字符检测电路接收字符的值。 字检测电路基于字符的接收值来确定字值。 字检测电路包括比较电路和累加器。 比较电路将字中的字符的值与字中的至少一个其他字符的值进行比较，并根据比较提供字符值。 累加器具有耦合以从比较电路接收字符值的输入和用于提供由累加器接收的字符值的求和的输出。

公开(公告)号：US07095353B2

公开(公告)日：2006-08-22

申请号：US10997058

申请日：2004-11-23

申请人： Wendell Sander ,  Stephan V. Schell ,  Matthew Mow

发明人： Wendell Sander ,  Stephan V. Schell ,  Matthew Mow

IPC分类号： H03M1/60 ,  H04L7/00

CPC分类号： H03M5/10

摘要： A technique of processing an input signal having an input signal phase is disclosed. The technique includes determining a number of transitions of the input signal within a period having a start and an end. The technique includes determining a relative beginning phase of the input signal at the start of the period, which includes generating a first reference signal having a first reference signal frequency and a first reference signal phase synchronized with the start of the period, and detecting a first time interval required for the input signal phase to have a first specified relationship to the first reference signal phase. The technique includes similarly determining a relative ending phase of the input signal at the end of the period. The technique includes determining an input signal temporal characteristic from the number of transitions and the relative beginning phase and the relative ending phase.

摘要翻译： 公开了一种处理具有输入信号相位的输入信号的技术。 该技术包括在具有开始和结束的时段内确定输入信号的转换次数。 该技术包括确定在该周期开始时输入信号的相对起始相位，其包括产生具有第一参考信号频率的第一参考信号和与周期开始同步的第一参考信号相位，以及检测第一参考信号 输入信号相位与第一参考信号相位具有第一指定关系所需的时间间隔。 该技术包括在周期结束时类似地确定输入信号的相对结束阶段。 该技术包括从转换次数和相对开始阶段和相对结束阶段确定输入信号时间特性。

公开(公告)号：US5357248A

公开(公告)日：1994-10-18

申请号：US39528

申请日：1993-03-29

申请人： Takeshi Sasaki

发明人： Takeshi Sasaki

IPC分类号： H03H17/00 ,  H03H17/02 ,  H03H17/06 ,  H03M5/10

CPC分类号： H03H17/0614 ,  H03H17/0621 ,  H03H17/0628 ,  H03M5/10

摘要： A sampling rate converter has a pulse-dulation modulator for converting a pulse-code-modulated signal, which has been sampled with a first sampling frequency, into a pulse-dulation-modulated signal, and a counter for counting pulses of the pulse-dulation-modulated signal and producing a count in each sampling period determined by a second sampling frequency. The sampling rate converter also includes a multiplier connected to the output of the counter.

摘要翻译： 采样率转换器具有脉冲调制器，用于将已经以第一采样频率采样的脉冲编码调制信号转换为脉冲调制信号，以及用于计数脉冲调制脉冲的计数器 并且产生由第二采样频率确定的每个采样周期中的计数。 采样率转换器还包括连接到计数器的输出的乘法器。

公开(公告)号：US20190132000A1

公开(公告)日：2019-05-02

申请号：US15850560

申请日：2017-12-21

申请人： YUYANG DNU CO., LTD.

发明人： Sang Ok KIM ,  Byung Oh KIM ,  Sang Ho YOON ,  TAE HOON LEE ,  JUNG IL HAN ,  Jung Ho LEE

IPC分类号： H03M5/12 ,  H04B10/116 ,  H04B10/524 ,  H03M5/10 ,  H03M5/08

CPC分类号： H03M5/12 ,  H03M5/08 ,  H03M5/10 ,  H03M5/145 ,  H03M7/14 ,  H04B10/116 ,  H04B10/524

摘要： The present disclosure in some embodiments provides a transmit data structure and a communication method using the same, which can minimize the loss of the transmit data during the transmission and reception of the transmit data by optical camera communication.

公开(公告)号：US20060109147A1

公开(公告)日：2006-05-25

申请号：US10997058

申请日：2004-11-23

申请人： Wendell Sander ,  Stephan Schell ,  Matthew Mow

发明人： Wendell Sander ,  Stephan Schell ,  Matthew Mow

IPC分类号： H03M7/00

CPC分类号： H03M5/10

摘要： A technique of processing an input signal having an input signal phase is disclosed. The technique includes determining a number of transitions of the input signal within a period having a start and an end. The technique includes determining a relative beginning phase of the input signal at the start of the period, which includes generating a first reference signal having a first reference signal frequency and a first reference signal phase synchronized with the start of the period, and detecting a first time interval required for the input signal phase to have a first specified relationship to the first reference signal phase. The technique includes similarly determining a relative ending phase of the input signal at the end of the period. The technique includes determining an input signal temporal characteristic from the number of transitions and the relative beginning phase and the relative ending phase.

摘要翻译： 公开了一种处理具有输入信号相位的输入信号的技术。 该技术包括在具有开始和结束的时段内确定输入信号的转换次数。 该技术包括确定在该周期开始时输入信号的相对起始相位，其包括产生具有第一参考信号频率的第一参考信号和与周期开始同步的第一参考信号相位，以及检测第一参考信号 输入信号相位与第一参考信号相位具有第一指定关系所需的时间间隔。 该技术包括在周期结束时类似地确定输入信号的相对结束阶段。 该技术包括从转换次数和相对开始阶段和相对结束阶段确定输入信号时间特性。

公开(公告)号：US6084537A

公开(公告)日：2000-07-04

申请号：US20102

申请日：1998-02-06

申请人： Steven P. Hardy ,  James T. Doyle

发明人： Steven P. Hardy ,  James T. Doyle

IPC分类号： H03M5/04

CPC分类号： H03M5/04 ,  H03M5/06 ,  H03M5/10

摘要： A return-to-zero transmitter includes a one shot circuit, an output circuitry and a timing generator. The one shot circuit is constructed to receive a signal that is indicative of a digital bit and generate an output signal that is indicative of positive and negative edges of the bit. The timing generator receives the output signal of the one shot circuit and causes the output circuitry to generate return-to-zero pulses in response to this signal.

摘要翻译： 一个归零发射器包括单触发电路，输出电路和定时发生器。 单触发电路被构造为接收指示数字位的信号，并产生指示该位的正和负沿的输出信号。 定时发生器接收单触发电路的输出信号，并使输出电路响应于该信号产生归零脉冲。