Digital fast dB to gain multiplier for envelope tracking systems
    1.
    发明授权
    Digital fast dB to gain multiplier for envelope tracking systems 有权
    数字快速dB以增加包络跟踪系统的乘数

    公开(公告)号:US09075673B2

    公开(公告)日:2015-07-07

    申请号:US13297470

    申请日:2011-11-16

    摘要: A digital log gain to digital linear gain multiplier is disclosed. The digital log gain to digital linear gain multiplier includes a log gain splitter adapted to split a log gain input into an integer log part and a remainder log part. A log scale-to-linear scale converter is adapted to output a linear gain value in response to the integer log part and the remainder log part. A gain multiply circuit is adapted to multiply a digital signal by the linear gain value to output a gain-enhanced digital signal.

    摘要翻译: 公开了对数字线性增益乘数的数字对数增益。 对数字线性增益乘数的数字对数增益包括一个对数增益分配器,适用于将日志增益输入分解为整数对数部分和余数对数部分。 对数缩放比例转换器适于响应于整数对数部分和其余日志部分输出线性增益值。 增益乘法电路适于将数字信号乘以线性增益值以输出增益增强数字信号。

    Primary base exponential line coding
    3.
    发明申请
    Primary base exponential line coding 审中-公开
    主基指数线编码

    公开(公告)号:US20120176256A1

    公开(公告)日:2012-07-12

    申请号:US12930625

    申请日:2011-01-12

    申请人: Daniel E. South

    发明人: Daniel E. South

    IPC分类号: H03M7/00

    CPC分类号: H03M7/04

    摘要: Line coding, or data coding at the physical layer of transmission, storage and retrieval has typically been previously by a digital representation of the actual binary coded value of a positional data bit in a byte. Bits are constructed into bytes of eight bits, words are constructed of two bytes, and so forth. Each more significant bit positional location in a typical eight bit byte is of greater value by a factor of two. This method of data coding is pervasive throughout modern information technology related devices, equipment and processing systems. In one embodiment of the invention—at bit location following that of 24—the bit value of the bits in a byte or larger data word structure increase by double the exponent of the previous binary digit value. In another embodiment of the invention—at bit location following that of 24—the bit value of the bits in a byte or larger data word structure increase to the square of the exponent of the previous binary digit value. Invented format enables massively more digital data easily be represented, stored, retrieved or transmitted by just one byte, word or larger data structure.

    摘要翻译: 传输,存储和检索的物理层的线路编码或数据编码通常是以字节为单位的位置数据位的实际二进制编码值的数字表示。 位被构造成八位的字节,字由两个字节构成,等等。 一个典型的八位字节中每一个更有意义的位位置都有两倍的值。 这种数据编码方法遍及现代信息技术相关设备,设备和处理系统。 在本发明的一个实施例中,在24位之后的比特位置,一个字节或更大的数据字结构中的比特的比特值增加了先前二进制数值的指数的两倍。 在本发明的另一实施例中,在24位之后的比特位置,一个字节或更大数据字结构中的比特的比特值增加到先前二进制数值的指数的平方。 发明的格式使得能够通过仅一个字节,字或更大的数据结构容易地表示,存储,检索或发送大量更多的数字数据。

    Variable length integer encoding system and method
    4.
    发明授权
    Variable length integer encoding system and method 有权
    可变长度整数编码系统和方法

    公开(公告)号:US07965207B2

    公开(公告)日:2011-06-21

    申请号:US12572990

    申请日:2009-10-02

    IPC分类号: H03M7/40

    CPC分类号: H03M7/40 H03M7/04

    摘要: Large integers may be stored according to byte-stable variable-length encoding systems and methods, eliminating the need to store many leading-zero bits in large integers. Such a byte-stable variable-length integer encoding scheme may represent identical sequences of numbers in a consistent byte pattern within a byte stream, preserving the redundancy of the data and allowing for improved compression rates.

    摘要翻译: 可以根据字节稳定的可变长度编码系统和方法来存储大整数,消除了在大整数中存储许多前导零位的需要。 这种字节稳定的可变长度整数编码方案可以在字节流内以一致的字节模式表示相同的数字序列,保持数据的冗余并允许改进的压缩率。

    Method and encoder for encoding a size of a data section and method and decoder for determining a size of a data section
    5.
    发明授权
    Method and encoder for encoding a size of a data section and method and decoder for determining a size of a data section 失效
    用于编码数据部分的大小的方法和编码器以及用于确定数据部分的大小的方法和解码器

    公开(公告)号:US07701369B2

    公开(公告)日:2010-04-20

    申请号:US12215318

    申请日:2008-06-26

    申请人: Chris Kuppens

    发明人: Chris Kuppens

    IPC分类号: H03M7/00

    CPC分类号: H03M7/12 H03M7/04

    摘要: The invention is related to a method for encoding a size of a data section and to an encoder for encoding a size of a data section. The invention is further related to a method for determining a size of a data section and to a decoder for determining a size of a data section. The method for encoding a size of a data section comprises the step of increasing the size and the step of determining the number of information units necessary for encoding the increased size. Furthermore, the method comprises the step of decreasing the determined number and the step of forming a code by encoding the decreased determined number and by encoding the increased size. Due to knowledge of an increased lower bound, instead of the number of information units actually necessary for encoding the size a decreased number can be encoded.

    摘要翻译: 本发明涉及用于对数据部分的大小进行编码的方法和用于编码数据部分的大小的编码器。 本发明还涉及一种用于确定数据部分的大小和用于确定数据部分的大小的解码器的方法。 用于对数据部分的大小进行编码的方法包括增加大小的步骤和确定编码增加的大小所需的信息单元的数量的步骤。 此外,该方法包括通过对减少的确定数量进行编码并通过对增加的大小进行编码来减少确定的数量和形成代码的步骤的步骤。 由于知道增加的下限,而不是编码大小实际所需的信息单元的数量,可以编码减少的数目。

    EFFICIENT CODING OF SMALL INTEGER SETS
    6.
    发明申请
    EFFICIENT CODING OF SMALL INTEGER SETS 有权
    小整数集的有效编码

    公开(公告)号:US20090267810A1

    公开(公告)日:2009-10-29

    申请号:US12111481

    申请日:2008-04-29

    IPC分类号: H03M7/00

    CPC分类号: H03M7/30 H03M7/04

    摘要: Techniques for coding integer sets are described herein. According to one embodiment, for each data range of parameters to be encoded, a number of bits required to represent a maximum parameter among the parameters in each data range is determined, including a first number of bits and a second number of bits corresponding to the first and second data ranges. Each parameter in the first data range is encoded using the first number of bits and each parameter in the second data range is encoded using the second number of bits, where the data stream further includes a value representing the first number of bits and the data stream is to be decoded by a decoder using the value representing the first number of bits to recover the first number of bits and the second number of bits, which are used to recover each parameter from the data stream.

    摘要翻译: 本文描述了用于编码整数集的技术。 根据一个实施例,对于要编码的参数的每个数据范围,确定在每个数据范围中的参数之中表示最大参数所需的位数,包括第一位数和第二位数 第一和第二数据范围。 第一数据范围中的每个参数使用第一数量的比特进行编码,并且使用第二比特数对第二数据范围中的每个参数进行编码,其中数据流还包括表示第一比特数的值和数据流 由解码器使用表示第一比特数的值来解码,以恢复用于从数据流中恢复每个参数的第一比特数和第二比特数。

    64B/66B Encoding data generation method and circuit
    7.
    发明授权
    64B/66B Encoding data generation method and circuit 有权
    64B / 66B编码数据生成方法和电路

    公开(公告)号:US07463169B2

    公开(公告)日:2008-12-09

    申请号:US11877831

    申请日:2007-10-24

    IPC分类号: H03M7/00

    CPC分类号: H03M7/04

    摘要: In a more effective data generation method and circuit used for 64B/66B encoding, when packet data, and head and tail information of the data packet are received, write user data in which a head and tail identifying bytes are respectively added to a head and a tail of the packet data based on the head and tail information is associated with control data indicating positions of both of the identifying bytes to be written in a memory sequentially from a predetermined address of the memory. From the predetermined address, user data by 8 bytes and the control data corresponding to the user data are sequentially read to be provided to a 64B/66B encoding circuit. During a period in which the reading can not be made, idle bytes for 8n bytes (n≧1) and control data indicating the idle bytes, or maintenance user data of 8n bytes (n≧2) in which the head and tail identifying bytes are respectively added to a head and a tail of the maintenance information and control data indicating positions of both of the identifying bytes are provided to the 64B/66B encoding circuit.

    摘要翻译: 在用于64B / 66B编码的更有效的数据生成方法和电路中,当分组数据和数据分组的头尾信息被接收时,写入将头尾识别字节分别添加到头部的用户数据, 基于头尾信息的分组数据的尾部与从存储器的预定地址顺序地指示要写入存储器的两个识别字节的位置的控制数据相关联。 从预定地址,按8字节的用户数据和对应于用户数据的控制数据被顺序读取以提供给64B / 66B编码电路。 在不能进行读取的期间,8n字节(n> = 1)的空闲字节和指示空闲字节的控制数据,或8n字节(n> = 2)的维护用户数据,其中头和尾 识别字节分别被添加到维护信息的头部和尾部,并且指示两个标识字节的位置的控制数据被提供给64B / 66B编码电路。

    64B/66B Encoding Data Generation Method and Circuit
    8.
    发明申请
    64B/66B Encoding Data Generation Method and Circuit 有权
    64B / 66B编码数据生成方法与电路

    公开(公告)号:US20080100481A1

    公开(公告)日:2008-05-01

    申请号:US11877831

    申请日:2007-10-24

    IPC分类号: H03M5/00

    CPC分类号: H03M7/04

    摘要: In a more effective data generation method and circuit used for 64B/66B encoding, when packet data, and head and tail information of the data packet are received, write user data in which a head and tail identifying bytes are respectively added to a head and a tail of the packet data based on the head and tail information is associated with control data indicating positions of both of the identifying bytes to be written in a memory sequentially from a predetermined address of the memory. From the predetermined address, user data by 8 bytes and the control data corresponding to the user data are sequentially read to be provided to a 64B/66B encoding circuit. During a period in which the reading can not be made, idle bytes for 8n bytes (n≧1) and control data indicating the idle bytes, or maintenance user data of 8n bytes (n≧2) in which the head and tail identifying bytes are respectively added to a head and a tail of the maintenance information and control data indicating positions of both of the identifying bytes are provided to the 64B/66B encoding circuit.

    摘要翻译: 在用于64B / 66B编码的更有效的数据生成方法和电路中,当分组数据和数据分组的头尾信息被接收时,写入将头尾识别字节分别添加到头部的用户数据, 基于头尾信息的分组数据的尾部与从存储器的预定地址顺序地指示要写入存储器的两个识别字节的位置的控制数据相关联。 从预定地址,按8字节的用户数据和对应于用户数据的控制数据被顺序读取以提供给64B / 66B编码电路。 在不能进行读取的期间,8n字节(n> = 1)的空闲字节和指示空闲字节的控制数据,或8n字节(n> = 2)的维护用户数据,其中头和尾 识别字节分别被添加到维护信息的头部和尾部,并且指示两个标识字节的位置的控制数据被提供给64B / 66B编码电路。

    Method and apparatus for encoding binary data as a zero terminated string
    9.
    发明授权
    Method and apparatus for encoding binary data as a zero terminated string 有权
    用于将二进制数据编码为零终止字符串的方法和装置

    公开(公告)号:US07280055B2

    公开(公告)日:2007-10-09

    申请号:US11112776

    申请日:2005-04-22

    申请人: Gabor Drasny

    发明人: Gabor Drasny

    IPC分类号: H03M7/46

    CPC分类号: H03M7/04

    摘要: Passing input strings through an application programming interface between functions that take null byte terminated strings as arguments, where at least some of said input strings contain null bytes internally. This is accomplished by storing the positions of the null bytes relative to the start of the block and storing the non-null bytes in their relative order to prevent said internal null strings from being treated as terminal null strings.

    摘要翻译: 在使用空字节终止的字符串作为参数的函数之间通过应用程序编程接口传递输入字符串,其中至少一些所述输入字符串在内部包含空字节。 这是通过存储空字节相对于块的开始的位置并以相对的顺序存储非空字节来实现的,以防止所述内部空字符串被视为终端空​​字符串。

    Data converter with multiple conversions for padded-protocol interface
    10.
    发明授权
    Data converter with multiple conversions for padded-protocol interface 有权
    具有多个转换的数据转换器,用于填充协议接口

    公开(公告)号:US07151470B1

    公开(公告)日:2006-12-19

    申请号:US10969450

    申请日:2004-10-20

    IPC分类号: H03M7/00

    CPC分类号: H03M7/04

    摘要: A data converter, or “gearbox,” for a padded protocol interface can perform a number of different conversions—e.g., between 64 and 66 bits, between 24 and 26 bits, or between 48 and 50 bits. This is accomplished by clocking the gearbox at different clock speeds, all derived from the same master clock (which may be recovered from the data in a receiver embodiment) using programmable dividers that allow the user to select the clock speed. When the conversion is not that one with the maximum width for which the gearbox is designed, unused bits are ignored. The converter can also find padding bits, for alignment purposes, in data of different widths, again ignoring unused bits when the data are not the widest for which the converter is designed.

    摘要翻译: 用于填充协议接口的数据转换器或“变速箱”可以执行多个不同的转换,例如在64位和66位之间,在24位和26位之间,或在48位和50位之间。 这是通过使用可允许用户选择时钟速度的可编程分频器从不同时钟速度对齿轮箱进行计时的,这些时钟速度全部来自相同的主时钟(可以从接收机实施例中的数据恢复)。 当转换不是设计齿轮箱的最大宽度的转换时,未使用的位将被忽略。 转换器还可以在不同宽度的数据中找到用于对齐目的的填充位,当数据不是设计转换器的最宽时,再次忽略未使用的位。