公开(公告)号：US06734069B2

公开(公告)日：2004-05-11

申请号：US10221265

申请日：2002-09-11

申请人： Koji Eriguchi

发明人： Koji Eriguchi

IPC分类号： H01L214757

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/3115 ,  H01L21/31155 ,  H01L21/31641 ,  H01L21/823462 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/6659

摘要： A high dielectric film is formed by utilizing atom injection into a film through ion implantation or the like, and heat treatment. For example, an SiO2 film 102 which is a thermal oxide film is formed on a silicon substrate 101, and then Zr ions (Zr+) are injected from a plasma 105 into the SiO2 film 102. Thereafter, by annealing the SiO2 film 102 and a Zr injected layer 103, injected Zr is diffused in the Zr injected layer 103 and then the SiO2 film 102 and the Zr injected layer 103 are as a whole changed into a high dielectric film 106 of a high dielectric constant formed of Zr—Si—O (silicate). By using the high dielectric film 106 as an insulating film for an MISFET, an MISFET having excellent gate leakage properties can be achieved.

摘要翻译： 通过利用离子注入等将原子注入薄膜，进行热处理，形成高介电膜。 例如，在硅衬底101上形成作为热氧化膜的SiO 2膜102，然后将Zr离子（Zr +）从等离子体105注入到SiO 2膜102中。之后，通过退火SiO 2膜 102和注入了Zr的Zr注入层103扩散到Zr注入层103中，然后将SiO 2膜102和Zr注入层103整体变为高介电常数的由Zr- Si-O（硅酸盐）。 通过使用高电介质膜106作为MISFET的绝缘膜，可以实现具有优异栅极泄漏特性的MISFET。

公开(公告)号：US06605230B1

公开(公告)日：2003-08-12

申请号：US09155181

申请日：1999-03-26

申请人： Ming-Chi Liaw ,  Tien-Sheng Chao ,  Tan-Fu Lei

发明人： Ming-Chi Liaw ,  Tien-Sheng Chao ,  Tan-Fu Lei

IPC分类号： H01L214757

CPC分类号： H01L21/02071 ,  G03F7/423 ,  H01L21/31133

摘要： The present invention relates to a novel process for removing sidewall residue after dry-etching process. Conventionally, after dry-etching, photoresist and sidewall residues are removed by ozone ashing and hot sulfuric acid. Normally, they are hard to be removed completely. It was found in the present invention that the addition of fluorine-containing compound, preferably hydrogen fluoride and ammonium fluoride, in sulfuric acid results in complete removal of photoresist and sidewall residue without the need for stripper. The process is simple and does not affect the original procedures or the other films on the substrate. The present invention also relates to a novel solution for removing sidewall residue after dry-etching, which comprises sulfuric acid and a fluorine-containing compound, preferably hydrogen fluoride and ammonium fluoride, in the range of from 10:1 to 1000:1 by weight.

摘要翻译： 本发明涉及一种在干蚀刻工艺之后去除侧壁残留物的新方法。 通常，干蚀刻后，通过臭氧灰化和热硫酸除去光致抗蚀剂和侧壁残留物。 通常，它们很难被完全清除。 在本发明中发现，在硫酸中加入含氟化合物，优选氟化氢和氟化铵，导致完全去除光致抗蚀剂和侧壁残留物，而不需要剥离剂。 该方法简单，不影响原始程序或其他底物上的膜。 本发明还涉及一种用于在干法蚀刻之后除去侧壁残留物的新型溶液，其包含硫酸和含氟化合物，优选氟化氢和氟化铵，重量比为10:1至1000:1 。

公开(公告)号：US06605226B2

公开(公告)日：2003-08-12

申请号：US10170621

申请日：2002-06-10

申请人： Albert Wang ,  Scott Baron ,  Prasad Padmanabhan ,  Gerald M. Cox

发明人： Albert Wang ,  Scott Baron ,  Prasad Padmanabhan ,  Gerald M. Cox

IPC分类号： H01L214757

CPC分类号： G03F7/427 ,  H01L21/31138

摘要： A method is disclosed for speeding workpiece thoughput in low pressure, high temperature semiconductor processing reactor. The method includes loading a workpiece into a chamber at atmospheric pressure, bringing the chamber down to an intermediate pressure, and heating the wafer while under the intermediate pressure. The chamber is then pumped down to the operating pressure. The preferred embodiments involve single wafer plasma ashers, where a wafer is loaded onto lift pins at a position above a wafer chuck, the pressure is rapidly pumped down to about 40 Torr by rapidly opening and closing an isolation valve, and the wafer is simultaneously lowered to the heated chuck. Alternatively, the wafer can be pre-processed to remove an implanted photoresist crust at a first temperature and the chamber then backfilled to about 40 Torr for further heating to close to the chuck temperature. At 40 Torr, the heat transfer from the chuck to the wafer is relatively fast, but still slow enough to avoid thermal shock. In the interim, the pump line is further pumped down to operating pressure (about 1 Torr) behind the isolation valve. The chamber pressure is then again reduced by opening the isolation valve, and the wafer is processed.