LED strobe light
    1.
    发明申请
    LED strobe light 有权
    LED闪光灯

    公开(公告)号:US20060255705A1

    公开(公告)日:2006-11-16

    申请号:US11492102

    申请日:2006-07-25

    Applicant: Garrett Young

    Inventor: Garrett Young

    Abstract: An LED light that includes an LED light source. A thermoelectric device is configured to maintain the LED light source within a predetermined temperature range. A controller provides a pulse signal to the LED light source, so that the LED light can particularly operate as a strobe light. Such an LED light can find application in an obstruction light.

    Abstract translation: 包括LED光源的LED灯。 热电装置被配置为将LED光源保持在预定的温度范围内。 控制器向LED光源提供脉冲信号,使得LED灯可以特别地作为闪光灯工作。 这样的LED灯可以在障碍物中发现应用。

    File transfer system and method
    2.
    发明授权
    File transfer system and method 有权
    文件传输系统和方法

    公开(公告)号:US06850962B1

    公开(公告)日:2005-02-01

    申请号:US09306790

    申请日:1999-05-07

    Abstract: A system for transferring files between a source location and a target location can transfer different portions of the file across two or more logical channels. The portions of the file transmitted over the logical channels can be transmitted independently. In addition, the portions of the file can be transmitted over one or more logical channels asynchronously. The logic controls for managing the file transfer can be distributed over multiple systems located at separate locations and operating independently. During the transfer of the file, markers are generated that point to the location in memory where the file is stored. These markers obviate the need to store the file in a buffer or an archive log during the file transfer.

    Abstract translation: 用于在源位置和目标位置之间传送文件的系统可以跨两个或多个逻辑信道传送文件的不同部分。 通过逻辑信道发送的文件部分可以独立发送。 此外,文件的部分可以通过一个或多个逻辑信道异步传输。 用于管理文件传输的逻辑控制可以分布在位于不同位置并独立运行的多个系统上。 在传输文件期间,生成指向存储文件存储在内存中的位置的标记。 这些标记避免了在文件传输期间将文件存储在缓冲区或存档日志中的需要。

    Remotely mirrored data storage system with a count indicative of data
consistency
    3.
    发明授权
    Remotely mirrored data storage system with a count indicative of data consistency 有权
    远程镜像数据存储系统,计数表示数据一致性

    公开(公告)号:US6052797A

    公开(公告)日:2000-04-18

    申请号:US137546

    申请日:1998-08-20

    Abstract: Two data storage systems are interconnected by a data link for remote mirroring of data. Each volume of data is configured as local, primary in a remotely mirrored volume pair, or secondary in a remotely mirrored volume pair. Normally, a host computer directly accesses either a local or a primary volume, and data written to a primary volume is automatically sent over the link to a corresponding secondary volume. Each remotely mirrored volume pair can operate in a selected synchronization mode including synchronous, semi-synchronous, adaptive copy--remote write pending, and adaptive copy--disk. Each write request transmitted over the link between the data storage systems includes not only the data for at least one track in the secondary volume to be updated but also the current "invalid track" count for the secondary volume as computed by the data storage system containing the corresponding primary volume. Therefore, once a disaster occurs that destroys the data storage system containing the primary volume, the data storage system containing the secondary volume has an indication of the degree of consistency of the secondary volume. The "invalid tracks" count can be used to determine an appropriate recovery operation for the volume, and can be used to selectively restrict read/write access to the volume when the user decides that synchronization should be required for a write access. Moreover, direct write access to a secondary volume is denied if remote mirroring is not suspended.

    Abstract translation: 两个数据存储系统通过用于数据远程镜像的数据链路相互连接。 每卷数据被配置为本地,主要在远程镜像卷对中,或辅助在远程镜像卷对中。 通常,主机直接访问本地或主卷,并且写入主卷的数据将通过链接自动发送到相应的辅助卷。 每个远程镜像卷对可以在所选择的同步模式中操作,包括同步,半同步,自适应复制远程写入挂起和自适应复制盘。 通过数据存储系统之间的链路发送的每个写入请求不仅包括要被更新的辅助卷中的至少一个轨道的数据,还包括由数据存储系统计算出的辅助卷的当前“无效轨道”计数, 相应的主卷。 因此,一旦出现破坏包含主卷的数据存储系统的灾难,包含辅助卷的数据存储系统就会显示辅助卷的一致性程度。 可以使用“无效轨道”计数来确定卷的适当的恢复操作,并且可以用于在用户决定写入访问需要同步时,选择性地限制对卷的读/写访问。 此外,如果远程镜像未挂起,则对副卷的直接写入访问将被拒绝。

    Method and apparatus for polling and selecting any paired device in any
drawer
    4.
    发明授权
    Method and apparatus for polling and selecting any paired device in any drawer 失效
    在任何抽屉中轮询和选择任何配对设备的方法和装置

    公开(公告)号:US6021475A

    公开(公告)日:2000-02-01

    申请号:US26366

    申请日:1998-02-19

    CPC classification number: G06F11/008

    Abstract: A device adapter maintains a device polling table in memory that can be dynamically changed in response to disk drive device failures and is updated with each poll so that failed devices can be quickly deleted from the table and alternate device polling mapping can be achieved. A system reconfiguration is not necessary to implement the modifications to the system processing. The device adapter is capable of a greater variety of processing tasks than is conventional, including determining cylinder head position and copying data that otherwise would be performed by a control unit.

    Abstract translation: 设备适配器在内存中维护设备轮询表,可以根据磁盘驱动器设备故障动态更改设备轮询表,并通过每次轮询进行更新,从而可以从表中快速删除故障设备,并可实现备用设备轮询映射。 系统重新配置不需要实现对系统处理的修改。 设备适配器能够具有比常规的更多种类的处理任务,包括确定气缸盖位置和复制另外由控制单元执行的数据。

    Bus interface controller for serially-accessed variable-access-time
memory device
    5.
    发明授权
    Bus interface controller for serially-accessed variable-access-time memory device 失效
    总线接口控制器,用于串行访问可变存取时存储器件

    公开(公告)号:US5901293A

    公开(公告)日:1999-05-04

    申请号:US669942

    申请日:1996-06-25

    CPC classification number: G06F13/4239

    Abstract: A method and controller circuitry for coupling a variable access time serial memory device to a microprocessor is disclosed. The controller circuitry includes an input for receiving address signal lines and control signal lines generated by the microprocessor, control signal lines generated by the device, and control signal lines and data signal lines for sending signals to the microprocessor and to the device. The controller circuitry further includes a decoder, responsive to the received address signal lines and control signal lines, for determining if the device can immediately respond to the microprocessor-generated request. If the device can respond to the request immediately the controller circuitry signals the device to respond to the request; otherwise, the controller circuitry responds to the request, and sends signals to the device to prepare the device to respond to future microprocessor-generated requests. The controller circuitry further includes memory to allow it to alter its responses to the microprocessor and its signals to the device dependent upon prior signals it has sent and received.

    Abstract translation: 公开了一种用于将可变存取时间串行存储器件耦合到微处理器的方法和控制器电路。 控制器电路包括用于接收由微处理器产生的地址信号线和控制信号线的输入,由该器件产生的控制信号线,以及用于向微处理器和设备发送信号的控制信号线和数据信号线。 控制器电路还包括响应于接收到的地址信号线和控制信号线的解码器,用于确定设备是否可以立即响应微处理器产生的请求。 如果设备可以立即响应请求,则控制器电路发信号通知设备以响应请求; 否则,控制器电路响应该请求,并向该设备发送信号以准备该设备以响应将来的微处理器产生的请求。 控制器电路还包括存储器,以允许其根据已经发送和接收的先前信号来改变其对微处理器的响应及其对设备的信号。

    Multiprocessing system including an apparatus for optimizing spin--lock
operations
    6.
    发明授权
    Multiprocessing system including an apparatus for optimizing spin--lock operations 失效
    多处理系统包括用于优化旋转锁定操作的装置

    公开(公告)号:US5860159A

    公开(公告)日:1999-01-12

    申请号:US674272

    申请日:1996-07-01

    CPC classification number: G06F12/0828 G06F12/0813 G06F9/466 G06F2212/2542

    Abstract: A multiprocessing system having a plurality of processing nodes interconnected by an interconnect network. To optimize performance during spin-lock operations, a home agent prioritizes the servicing of read-to-own (RTO) transaction requests over the servicing of certain read-to-share (RTS) transaction requests, even if the RTO transaction requests are received by the processing node after receipt of the RTS transaction requests. In one implementation, this is accomplished by providing a first queue within the home agent for receiving RTO transaction requests conveyed via the interconnect network which is separate from a second queue for receiving RTS transaction requests. The queues may each be implemented with FIFO buffers. A home agent control unit is configured to service a pending RTO transaction request within the RTO queue before servicing an RTS transaction request in the second queue, even though the RTS transaction request was received by the processing node from the interconnect network prior to receiving the RTO transaction request.

    Abstract translation: 具有通过互连网络互连的多个处理节点的多处理系统。 为了在自旋锁定操作期间优化性能,归属代理通过对特定读/写(RTS)事务请求的服务来优先处理对自己(RTO)事务请求的服务,即使接收到RTO事务请求 由处理节点收到RTS事务请求后。 在一个实现中,这通过在归属代理内提供用于接收经由互连网络传送的RTO事务请求的第一队列来实现,所述互连网络与用于接收RTS事务请求的第二队列分开。 每个队列可以使用FIFO缓冲区来实现。 归属代理控制单元被配置为在服务于第二队列中的RTS事务请求之前在RTO队列内服务待定的RTO事务请求,即使在接收到RTO之前RTS处理请求被处理节点从互连网络接收到 交易请求

    Enabling PCI configuration space for multiple functions
    7.
    发明授权
    Enabling PCI configuration space for multiple functions 失效
    为多个功能启用PCI配置空间

    公开(公告)号:US5832238A

    公开(公告)日:1998-11-03

    申请号:US733998

    申请日:1996-10-18

    Applicant: Frank P. Helms

    Inventor: Frank P. Helms

    CPC classification number: G06F13/4063 G06F13/4068

    Abstract: A Peripheral Component Interconnect (PCI) compatible peripheral device for coupling to a PCI bus, the peripheral device comprising a primary function component and a connection portion. The primary function includes a PCI interface for coupling to the PCI bus, and a primary configuration space coupled to the PCI interface and accessible by the PCI bus via the PCI interface. The connection portion is coupled to the primary function component and supports a secondary function component. The primary function component provides PCI bus access via the PCI interface to the secondary function component when the secondary function component is coupled to the connection portion. The primary function component provides PCI bus access via the PCI interface to a secondary configuration space when the secondary function component is coupled to the connection portion.

    Abstract translation: 一种用于耦合到PCI总线的外围组件互连(PCI)兼容的外围设备,所述外围设备包括主要功能部件和连接部分。 主要功能包括用于耦合到PCI总线的PCI接口和耦合到PCI接口的主要配置空间,并可通过PCI接口由PCI总线访问。 连接部分耦合到主要功能部件并且支持辅助功能部件。 当辅助功能组件耦合到连接部分时,主要功能部件通过PCI接口将PCI总线接入辅助功能组件。 当辅助功能组件耦合到连接部分时,主要功能部件通过PCI接口将PCI总线访问提供给辅助配置空间。

    SIMD multiprocessor with an interconnection network to allow a datapath
element to access local memories
    10.
    发明授权
    SIMD multiprocessor with an interconnection network to allow a datapath element to access local memories 失效
    具有互连网络的SIMD多处理器,以允许数据路径元件访问本地存储器

    公开(公告)号:US5815680A

    公开(公告)日:1998-09-29

    申请号:US356275

    申请日:1995-10-25

    Abstract: Datapath elements 1.sub.1 to 1.sub.N can exchange data respectively with local memories 2.sub.1 to 2.sub.N through data buses 6.sub.1 to 6.sub.N, so that parallel operations can be performed. The data bus 6.sub.1, which is connected with one datapath element 1.sub.1, can be connected with the other data buses 6.sub.2 to 6.sub.N through an interconnection network 5, so that by activating one datapath element 1.sub.1 only, data exchange can be made with all of the local memories 2.sub.1 to 2.sub.N through the data buses 6.sub.1 to 6.sub.N and the interconnection network 5. Thus, the multiple datapath elements can perform the parallel operations with being related with the multiple local memories: and a simple configuration is employed such that one datapath element can access to any one of the local memories.

    Abstract translation: PCT No.PCT / JP94 / 01479 Sec。 371日期1995年10月25日第 102(e)日期1995年10月25日PCT 1994年9月7日PCT PCT。 第WO95 / 09399号公报 日期1995年04月6日数据元素11至1N可以通过数据总线61至6N分别与本地存储器21至2N交换数据,从而可以执行并行操作。 与一个数据路径元件11连接的数据总线61可以通过互连网络5与其他数据总线62〜6N连接,从而仅通过激活一个数据路径元件11来进行数据交换, 本地存储器21至2N通过数据总线61至6N和互连网络5.因此,多个数据路径元件可以执行与多个本地存储器相关的并行操作:采用简单的配置,使得一个数据路径元素可以 访问任何一个本地记忆。

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