Radio communication apparatus and radio communication method

    公开(公告)号:US12082136B2

    公开(公告)日:2024-09-03

    申请号:US17536337

    申请日:2021-11-29

    申请人: NEC Corporation

    发明人: Shingo Watanabe

    IPC分类号: H04W56/00 H04L7/04

    CPC分类号: H04W56/001 H04L7/041

    摘要: A radio communication apparatus makes it possible to prevent contents of communication from being intercepted. The radio communication apparatus includes a generation unit configured to generate a first unique word based on operation time information of the radio communication apparatus before communication with a radio communication apparatus is started, and generate, for each radio frame, an ith unique word (i: an integer equal to or greater than two) based on an (i−1)th unique word when the communication is started, and a transmitting unit configured to transmit a first radio frame including the first unique word and an ith radio frame including the ith unique word to the radio communication apparatus.

    Data processing method and apparatus

    公开(公告)号:US12052339B2

    公开(公告)日:2024-07-30

    申请号:US17955173

    申请日:2022-09-28

    IPC分类号: H04L7/04 H04L7/00

    CPC分类号: H04L7/048 H04L7/0037

    摘要: Embodiments of this application disclose a data processing method, which can be applied to a clock synchronization network system. The system can correct, based on a clock frequency error or a time error, a data timestamp of a data packet collected by the system in a time period in which there is no reference clock, so that a corrected system time of the data packet is consistent with a reference time. This improves accuracy of data record.

    Concurrent multistandard detection receiver with prepacket transmission detection

    公开(公告)号:US12052338B2

    公开(公告)日:2024-07-30

    申请号:US18221112

    申请日:2023-07-12

    申请人: Qorvo US, Inc.

    发明人: Andrew Fort

    摘要: A concurrent multistandard detection receiver with prepacket transmission detection capabilities is disclosed. In one aspect, a receiver is configured to switch between two different wireless protocols, alternately listening for incoming messages on one then the other protocol. For at least one listening period, the receiver uses two pretransmission detectors that are configured to detect predictable pretransmission emissions. A third detector may detect traditional transmissions. On detection of a signal that matches a predictable pretransmission emission or a traditional transmission, the receiver confirms that an incoming signal according to that standard is being received and acts in accordance with that signal. If no such emission or transmission was received, or if after trying to confirm the presence of an incoming signal fails, the receiver switches back to listening according to the other protocol.

    FLEXIBLE PRECISION TIME PROTOCOL SYSTEM
    4.
    发明公开

    公开(公告)号:US20240231419A9

    公开(公告)日:2024-07-11

    申请号:US18488307

    申请日:2023-10-17

    IPC分类号: H04L7/04 H04J3/06

    CPC分类号: H04L7/04 H04J3/0667

    摘要: Clocking systems are disclosed. A clocking system can include first and second clock domains. Each clock domain can include circuitry with a counter. The clocking system can measure timing errors between these two domains by measuring a phase difference and determining a residual error. Based on the measured timing error, the clocking system can synchronize the time in the first and second clock domains by using at least one of the counters.

    Relay device and communication system

    公开(公告)号:US11990990B2

    公开(公告)日:2024-05-21

    申请号:US17710070

    申请日:2022-03-31

    IPC分类号: H04J3/06 H04L7/04 H04L7/10

    CPC分类号: H04J3/0658 H04L7/042 H04L7/10

    摘要: A relay device includes a plurality of physical ports (111-1 to 111-N) that receive frames, and a layer-2 protocol processing unit (113) that transfers the frame received by one of the physical ports (111-1 to 111-N) from at least one of the physical ports (111-1 to 111-N). The layer-2 protocol processing unit (113) has a filtering function for blocking frames other than a clock-time synchronization frame during transfer involving a port selected from the plurality of physical ports (111-1 to 111-N) as a port that relays only the clock-time synchronization frame used for synchronizing clock time.

    TIMING SYNCHRONIZATION SYSTEM
    7.
    发明公开

    公开(公告)号:US20240137200A1

    公开(公告)日:2024-04-25

    申请号:US18381858

    申请日:2023-10-18

    IPC分类号: H04L7/04

    CPC分类号: H04L7/04

    摘要: Clocking systems are disclosed. A clocking system can include first and second clock domains. Each clock domain can include circuitry with a counter. The clocking system can measure timing errors between these two domains by measuring a phase difference and determining a residual error. Based on the measured timing error, the clocking system can synchronize the time in the first and second clock domains by using at least one of the counters.

    Real-time computer system and method for controlling a system or a vehicle

    公开(公告)号:US11936767B2

    公开(公告)日:2024-03-19

    申请号:US17229094

    申请日:2021-04-13

    申请人: TTTech Auto AG

    IPC分类号: H04L7/04 H04Q9/00

    CPC分类号: H04L7/04 H04Q9/00 H04Q2209/30

    摘要: The invention relates to a real-time computer system for controlling a technical device, the real-time computer system comprising data acquisition components which are independent of each other, as well as non-secure data processing components for processing sensor data. A time server as well as a first communication system and a second communication system independent of it are provided, the time server periodically sending global time signals to the communication systems. Each data acquisition component has two communication controllers, wherein each data acquisition component is connected by two communication controllers via a communication line to the first communication system, and is connected by another communication controller to the second communication system via a communication line, such that each data acquisition component can transmit its sensor data to each of the two communication systems.

    Integrated Circuit Transceiver Array Synchronization

    公开(公告)号:US20240007264A1

    公开(公告)日:2024-01-04

    申请号:US18346189

    申请日:2023-06-30

    申请人: Innophase, Inc.

    IPC分类号: H04L7/04 H04L27/36 H04B7/06

    摘要: Transceiver array synchronization by receiving a clock signal and at least one synchronization pulse signal at each transceiver IC of a plurality of transceiver integrated circuit (IC) subarrays, wherein each transceiver IC subarray contains a respective set of serially connected transceiver ICs; and synchronizing the transceiver IC with other transceiver ICs of the respective set of serially connected transceiver ICs by resetting a delta-sigma modulator (DSM) circuit to a predetermined state in accordance with the received at least one synchronization pulse signal.

    RELAY DEVICE, TIME SYNCHRONIZATION SYSTEM, AND PROGRAM

    公开(公告)号:US20230388097A1

    公开(公告)日:2023-11-30

    申请号:US18031886

    申请日:2020-11-05

    IPC分类号: H04L7/00 H04L7/04

    CPC分类号: H04L7/0016 H04L7/041

    摘要: A relay device includes a device internal clock to indicate time; a memory to store information; a communication unit to transmit and receive a signal including a synchronization signal and a normal signal to and from a master and a slave. Further, there is a retention time processing unit to store synchronization signal information indicating the synchronization signal received by the communication unit in the memory and extract the synchronization signal information from the memory when a retention setting time longer than a first predetermined time elapses from the reception of the synchronization signal by using the time indicated by the device internal clock; and a transmission signal control unit to control the communication unit to stop transmitting the normal signal when the first predetermined time elapses from the reception of the synchronization signal and transmit the synchronization signal indicating the synchronization signal information.