Abstract:
It is presented a switched-mode power converter comprising: a first switch configured to be used for effecting a desired output voltage or a desired output current on an output of the switched-mode power converter; and an over-voltage controller configured to detect an input voltage and to control the first switch. The over-voltage controller is configured to, as a result of detecting an over-voltage of the input voltage, decrease a resistance of the first switch such that any over-voltage on the output is attenuated. A corresponding method is also presented, as well as the switched mode power converter comprised in a mobile communication terminal and a charger for electronic apparatuses.
Abstract:
An over voltage protection device (210) for a GFCl (10) having a voltage divider network (211 & 212) connected across t line terminals (300 & 310) of the GFCI, and an over voltage detecting diode (214) connected between the voltage divider network and a gate terminal of an SCR (Q1). The voltage divider and diode cause a signal to be fed to the gate terminal the SCR to trip the GFCI when an over voltage condition exists at the line terminals. The voltage divider is adjustable, with the sensitivity of the over voltage protection varying in accordance with adjustment of the potential from the voltage divider. In an embodiment of the invention, the circuit includes an indicator (216), such as a photodiode, which indicates the occurrence of an over voltage condition. In addition, a blocking diode (217) is connected between the gate terminal of the SCR and a triggering terminal of an integrated circuit of the GFCI where the over voltage detecting diode conducts curerrent to the gate terminal when an over voltage condition occurs, and the blocking diode conducts current to the gate terminal the SCR when a ground-fault condition occurs.
Abstract:
An electronic device formed as an integrated circuit (IC) wherein the electronic device further includes a transient voltage suppressing (TVS) circuit. The TVS circuit includes a triggering MOS transistor connected between an emitter and a collector of a first bipolar-junction transistor (BJT) coupled to a second BJT to form a SCR functioning as a main clamp circuit of the TVS circuit. The TVS circuit further includes a triggering circuit for generating a triggering signal for the triggering MOS transistor wherein the triggering circuit includes multiple stacked MOS transistors for turning into a conductive state by a transient voltage while maintaining a low leakage current.
Abstract:
Systems and methods presented herein provide for the control of electrical energy discharge from an electrode. In this regard, a sensor detects electrical energy discharged from the electrode and generates an electronic signal representative of a detected electrical energy discharge. Such a sensor may detect an electric field and/or light from the electrical energy discharge. The sensor may generate the electronic signal therefrom for subsequent processing. Accordingly, the system also includes a controller communicatively coupled to the sensor to determine a spurious discharge of the electrical energy discharge from the electrode. The controller processes the electronic signal to control at least one characteristic (e.g., voltage) of the electrical energy provided to the electrode. The controller may change a voltage of the electrical energy to the electrode in response to determining a spurious discharge of the electrical energy discharged from the electrode.
Abstract:
A power distribution unit that switches off power outlets in the event of an over-current condition by using circuitry that measures how long input current has exceeded a threshold and sending a reset signal to the power outlets when input current has exceeded the threshold for a predetermined time duration.
Abstract:
An over voltage protection device for a GFCI having a voltage divider network connected across the line terminals of the GFCI, and an over voltage detecting diode connected between the voltage divider network and a gate terminal of an SCR. The voltage divider and diode cause a signal to be fed to the gate terminal of the SCR to trip the GFCI when an over voltage condition exists at the line terminals. The voltage divider is adjustable, with the sensitivity of the over voltage protection varying in accordance with adjustment of the potential from the voltage divider. In an embodiment of the invention, the circuit includes an indicator, such as a photodiode, which indicates the occurrence of an over voltage condition. In addition, a blocking diode is connected between the gate terminal of the SCR and a triggering terminal of an integrated circuit of the GFCI where the over voltage detecting diode conducts current to the gate terminal when an over voltage condition occurs, and the blocking diode conducts current to the gate terminal of the SCR when a ground-fault condition occurs.
Abstract:
A circuit for protecting an electronic device including a differential nulling avalanche clamp circuit (200, 300) and method of using the circuit in an electronic system (100) to limit radio frequency overdrive. The electronic system (100) includes a surge clamp (130) coupled to dissipate an electrical surge effect of a first frequency from a noise sensitive node (140) and a ring wave clamp (120) coupled to dissipate an electrical surge effect of a second frequency from the noise sensitive node (140). The ring wave clamp circuit (200, 300) includes a first bipolar junction transistor (210, 310), a second bipolar junction transistor (220, 320) coupled to the first bipolar junction transistor (210, 310), and a resistive circuit (230, 330, 340) coupled to the first and second bipolar junction transistors (210, 220, 310, 320). A method of using the electronic system (100) in a device to limit radio frequency overdrive includes the steps of driving an output node with the radio frequency signal subject to overdrive effects (410), clamping a first order overdrive effect on a first node using a first clamp circuit (420), and clamping a second order overdrive effect on the first node using the differential nulling avalanche clamp circuit (430).
Abstract:
A semiconductor integrated circuit (IC) is provided with an electrostatic discharge (ESD) protection circuit. The ESD protection circuit includes a pad (102) connected to a first voltage source of a protected circuit node of the IC, and a silicon controlled rectifier (SCR) (106) having an anode coupled to the first voltage source, and the cathode coupled to a second voltage source. Capacitive turn-on devices are coupled between a first gate of the SCR and the first voltage source and a second gate of the SCR and the second voltage source.
Abstract:
The invention relates to an electronic circuit arrangement for connecting at least one active rotational speed sensor (1) of a vehicle to a control unit (6), by means of an associated signal conditioning circuit (4), for further processing of the rotational speed signal. A normally closed switching element (3) is added to the electric circuit for the power supply of the active rotational speed sensor (1), and can be switched into the open state by means for identifying an overload in the sensor line (A) or (B), in order to prevent an overload that would damage the active rotational speed sensor (1).
Abstract:
An ESD protection circuit (81) and a method for providing ESD protection is provided. In some embodiments, an N-channel transistor (24), which can be ESD damaged, is selectively turned on and made conducting. The purpose of turning on the N-channel transistor (24) is to maximize the Vt1 of the N-channel transistor (24). Vt1 is the drain-to-source voltage point at which the parasitic bipolar action of the N-channel transistor (24) first occurs. In some embodiments, the ESD protection circuit (81) includes a diode (64) which provides an additional current path from the I/O pad 31 to a first power supply node (76).