公开(公告)号：WO2016176418A1

公开(公告)日：2016-11-03

申请号：PCT/US2016/029720

申请日：2016-04-28

Applicant: 1366 TECHNOLOGIES, INC.

Inventor： JONCZYK, Ralf ,  WALLACE, Richard, L. ,  HARVEY, David, S.

IPC: C30B15/10 ,  C30B15/12 ,  C30B15/20 ,  C30B28/10 ,  C30B28/06 ,  C30B29/08

CPC classification number: C30B35/007 ,  C30B11/08 ,  C30B15/10 ,  C30B28/06 ,  C30B29/06 ,  C30B29/08 ,  C30B35/002

Abstract: A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90°C, and even as small as 50°C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100°C.

Abstract translation: 熔融半导体的主坩埚从供应坩埚中补充，供应坩埚保持在供应坩埚内始终存在两相的固体和液体半导体。 加入固体材料熔化的热量导致固体物质相变为液体，但不会导致供应坩埚内的液体的温度升高。 温度偏移有利地是小的，小于会导致形成的产品的问题的偏移。 固体产品材料作为一种温度缓冲液，以自动和被动地维持供应液体温度或非常接近相变温度。 对于硅，偏移保持在小于90℃，甚至低至50℃。 这些方法也适用于锗。 完全熔化半导体的现有技术的硅方法体验超过100℃的偏移。

公开(公告)号：WO2013066454A2

公开(公告)日：2013-05-10

申请号：PCT/US2012/049371

申请日：2012-08-02

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY ,  CAI, Wenjun ,  SCHUH, Christopher, A.

Inventor： CAI, Wenjun ,  SCHUH, Christopher, A.

IPC: C25D3/02

CPC classification number: C25D21/12 ,  C25D3/56 ,  C25D3/66 ,  C25D3/665 ,  C25D5/10 ,  C25D5/18 ,  C25D17/10

Abstract: Al—Mnx/Al—Mny multilayers with a wide range of structures ranging from microcrystalline to nanocrystalline and amorphous were electrodeposited using a single bath method under galvanostatic control from room temperature ionic liquid. By varying the Mn composition by - 1 - 3 at. % between layers, the grain sizes in one material can be systematically modulated between two values. For example, one specimen alternates between grain sizes of about 21 and 52 nm, in an alloy of average composition of 10.3 at.% Mn. Nanoindentation testing revealed multilayers with finer grains and higher Mn content exhibited better resistance to plastic deformation. Other alloy systems also are expected to be electrodeposited under similar circumstances.

Abstract translation: 在室温离子液体的恒电流控制下，使用单浴法电沉积具有范围广泛的结构范围从微晶到纳米晶和无定形的Al-Mnx / Al-Mny多层。 通过将Mn组成改变为1-3。 层之间的％，一种材料中的晶粒尺寸可以在两个值之间进行系统调制。 例如，一个样品在平均组成为10.3原子％的Mn的合金中交替在约21和52nm的晶粒尺寸之间。 纳米压痕测试揭示了具有更细晶粒的多层膜，较高的Mn含量表现出更好的抗塑性变形能力。 预期其他合金系统也将在类似的情况下电沉积。

公开(公告)号：WO2013044180A1

公开(公告)日：2013-03-28

申请号：PCT/US2012/056769

申请日：2012-09-22

Applicant: 1366 TECHNOLOGIES INC. ,  SACHS, Emanuel, M.

Inventor： SACHS, Emanuel, M.

IPC: H01L31/18

CPC classification number: H01L31/18 ,  B29C33/40 ,  B29C33/42 ,  B29C33/424 ,  B29C43/021 ,  B29C2033/426 ,  B29C2043/025 ,  B29C2059/023 ,  B81C99/0085 ,  B81C2201/0153 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002

Abstract: A method for imparting a pattern to a flowable resist material on a substrate entails providing a resist layer so thin that during a stamp wedging process, the resist never completely fills the space between the substrate and the bottom surface of a stamp between wedge protrusions, leaving gap everywhere therebetween. A gap remains between the resist and the extended surface of the stamp. If the resist layer as deposited is somewhat thicker than the targeted amount, it will simply result in a smaller gap between resist and tool. The presence of a continuous gap assures that no pressure builds under the stamp. Thus, the force on the protrusions i determined only by the pressure above the stamp and is well controlled, resulting in well-controlled hole sizes. The gap prevents resist from being pumped entirely out of any one region, and thus prevents any regions from being uncovered of resist. The stamp can be pulsed in its contact with the substrate, repeatedly deforming the indenting protrusions. Several pulses clears away any scum layer better than does a single press, as measured by an etch test comparison of the degree to which a normal etch for a normal duration etches away substrate material. A method for imparting a pattern to a flowable resist material on a substrate entails providing a resist layer so thin that during a stamp wedging process, the resist never completely fills the space between the substrate and the bottom surface of a stamp between wedge protrusions, leaving a gap everywhere therebetween. A gap remains between the resist and the extended surface of the stamp.

Abstract translation: 将图案赋予基板上的可流动抗蚀剂材料的方法需要提供如此薄的抗蚀剂层，使得在印模楔入过程中，抗蚀剂不会完全填充基板与楔形凸起之间的印模的底表面之间的空间，留下 差距在其间。 在抗蚀剂和印模的延伸表面之间留有间隙。 如果沉积的抗蚀剂层比目标量稍厚一些，则将简单地导致抗蚀剂和工具之间的较小的间隙。 连续间隙的存在确保印章下没有压力。 因此，突起上的力i仅由压力上方的压力确定并且被良好地控制，导致良好控制的孔尺寸。 间隙防止抗蚀剂完全从任何一个区域泵出，从而防止任何区域不被抗蚀剂覆盖。 印模可以与基板接触地脉动，使压痕突起重复变形。 几个脉冲比单次压机更好地清除任何浮渣层，如通过蚀刻测试比较正常蚀刻对正常时间蚀刻掉的衬底材料的程度所测量的。 将图案赋予基板上的可流动抗蚀剂材料的方法需要提供如此薄的抗蚀剂层，使得在印模楔入过程中，抗蚀剂不会完全填充基板与楔形凸起之间的印模的底表面之间的空间，留下 在它们之间的差距。 在抗蚀剂和印模的延伸表面之间留有间隙。

公开(公告)号：WO2011046783A2

公开(公告)日：2011-04-21

申请号：PCT/US2010/051630

申请日：2010-10-06

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY ,  RUAN, Shiyun ,  SCHUH, Christopher, A.

Inventor： RUAN, Shiyun ,  SCHUH, Christopher, A.

IPC: C25D3/66

CPC classification number: C25D3/665 ,  C25C3/06 ,  C25C3/18 ,  C25D3/44 ,  C25D3/56 ,  C25D3/66 ,  C25D5/10 ,  C25D5/18 ,  C25D21/12

Abstract: Power pulsing, such as current pulsing, is used to control the structures of metals and alloys electrodeposited in non-aqueous electrolytes. Using waveforms containing different types of pulses: cathodic, off -time and anodic, internal microstructure, such as grain size, phase composition, phase domain size, phase arrangement or distribution and surface morphologies of the as-deposited alloys can be tailored. Additionally, these alloys exhibit superior macroscopic mechanical properties, such as strength, hardness, ductility and density. Waveform shape methods can produce aluminum alloys that are comparably hard (about 5 GPa and as ductile (about 13% elongation at fracture) as steel yet nearly as light as aluminum; or, stated differently, harder than aluminum alloys, yet lighter than steel, at a similar ductility. Al-Mn alloys have been made with such strength to weight ratios. Additional properties can be controlled, using the shape of the current waveform.

Abstract translation: 使用诸如电流脉冲的功率脉冲来控制电沉积在非水电解质中的金属和合金的结构。 使用包含不同类型脉冲的波形：阴极，非正时和阳极，可定制内部微观结构，例如晶粒尺寸，相组成，相域尺寸，相位布置或分布以及沉积合金的表面形貌。 另外，这些合金表现出优异的宏观力学性能，例如强度，硬度，延展性和密度。 波形形状方法可以产生相当硬（约5GPa）和作为延性（约13％的断裂伸长率）的铝合金，但几乎与铝一样轻;或者说不同于铝合金比钢更硬， 以类似的延展性制造Al-Mn合金，其重量比可以通过使用电流波形的形状来控制。

公开(公告)号：WO2009002550A1

公开(公告)日：2008-12-31

申请号：PCT/US2008/008030

申请日：2008-06-26

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY ,  SACHS, Emanuel, M. ,  SERDY, James, G. ,  HANTSOO, Eerik, T.

Inventor： SACHS, Emanuel, M. ,  SERDY, James, G. ,  HANTSOO, Eerik, T.

IPC: H01L21/00

CPC classification number: C30B13/00 ,  C30B1/02 ,  C30B28/02 ,  C30B29/06 ,  H01L21/02532 ,  H01L21/02667 ,  H01L23/3171 ,  H01L29/04 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An original wafer, typically silicon, has the form of a desired end PV wafer. The original may be made by rapid solidification or CVD. It has small grains. It is encapsulated in a clean thin film, which contains and protects the silicon when recrystallized to create a larger grain structure. The capsule can be made by heating a wafer in the presence of oxygen, or steam, resulting in silicon dioxide on the outer surface, typically 1-2 microns. Further heating creates a molten zone in space, through which the wafer travels, resulting in recrystallization with a larger grain size. The capsule contains the molten material during recrystallization, and protects against impurities. Recrystallization may be in air. Thermal transfer through backing plates minimizes stresses and defects. After recrystallization, the capsule is removed.

Abstract translation: 原始晶片（通常为硅）具有期望的端部PV晶片的形式。 原件可以通过快速凝固或CVD制成。 它有小颗粒。 它被封装在干净的薄膜中，其在再结晶时含有并保护硅以产生更大的晶粒结构。 胶囊可以通过在氧气或蒸汽的存在下加热晶片来制造，从而在外表面上产生二氧化硅，通常为1-2微米。 进一步的加热在空间中产生熔融区，晶片经过该熔融区，导致晶粒尺寸更大的再结晶。 胶囊在再结晶期间含有熔融材料，防止杂质。 重结晶可能在空气中。 通过背板进行热转印可最大限度地减少应力和缺陷。 重结晶后，除去胶囊。

公开(公告)号：WO2007067304A3

公开(公告)日：2007-06-14

申请号：PCT/US2006/043877

申请日：2006-11-10

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY ,  SACHS, Emanuel, M.

Inventor： SACHS, Emanuel, M.

IPC: H01L31/04

Abstract: Crystalline silicon PV modules typically use tinned flat copper wire to increase the conductivity of a bus bar metallization and to interconnect to adjacent cells. Such a flat bus wire may be patterned with shallow v-shaped grooves using metal forming techniques, such as rolling, stamping and drawing. The grooves are designed so that incident light is reflected up toward the glass superstrate of t module at an internal interface angle that is large enough (typically greater than about 40°) so that the light undergoes total internal reflection at the glass-air interface and is reflected onto the solar cell. Grooves can be lengthwise along the conductor, or at an angle, angles. Rather than grooves, inclined faces can form pyramids, or other shapes.

公开(公告)号：WO2016122731A1

公开(公告)日：2016-08-04

申请号：PCT/US2015/055460

申请日：2015-10-14

Applicant: 1366 TECHNOLOGIES, INC.

Inventor： JONCZYK, Ralf ,  KERNAN, Brian, D. ,  HUDELSON, Stephen, G.D. ,  LORENZ, Adam, M. ,  SACHS, Emanuel, M.

IPC: H01L21/00

CPC classification number: H01L31/1804 ,  H01L21/00 ,  H01L31/02167 ,  H01L31/022425 ,  H01L31/0288 ,  H01L31/056 ,  H01L31/068 ,  Y02E10/52 ,  Y02E10/547 ,  Y02P70/521

Abstract: A semiconductor wafer forms on a mold containing a dopant. The dopant dopes a melt region adjacent the mold. There, dopant concentration is higher than in the melt bulk. A wafer starts solidifying. Dopant diffuses poorly in solid semiconductor. After a wafer starts solidifying, dopant can not enter the melt. Afterwards, the concentration of dopant in the melt adjacent the wafer surface is less than what was present where the wafer began to form. New wafer regions grow from a melt region whose dopant concentration lessens over time. This establishes a dopant gradient in the wafer, with higher concentration adjacent the mold. The gradient can be tailored. A gradient gives rise to a field that can function as a drift or back surface field. Solar collectors can have open grid conductors and better optical reflectors on the back surface, made possible by the intrinsic back surface field.

Abstract translation: 在包含掺杂剂的模具上形成半导体晶片。 掺杂剂掺杂与模具相邻的熔融区域。 那里，掺杂剂浓度高于熔体体积。 晶片开始凝固。 掺杂剂在固体半导体中扩散不良。 晶圆开始凝固后，掺杂剂不能进入熔体。 之后，与晶片表面相邻的熔体中的掺杂剂浓度小于晶片开始形成时的浓度。 新的晶片区域从其掺杂浓度随时间减少的熔融区域生长。 这在晶片中建立了掺杂剂梯度，在模具附近具有较高的浓度。 渐变可以定制。 梯度产生可用作漂移或背表面场的场。 太阳能集热器可以在后表面具有开放的栅格导体和更好的光学反射器，这可以通过固有的背面场来实现。

公开(公告)号：WO2013184192A2

公开(公告)日：2013-12-12

申请号：PCT/US2013/030354

申请日：2013-03-12

Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY

Inventor： CHENG, Nadia, G. ,  LOBOVSKY, Maxim, B. ,  HOSOI, Annette, E. ,  LAGNEMMA, Karl, D.

IPC: B65G61/00

CPC classification number: B25J18/06 ,  A61B1/00078 ,  A61B1/00147 ,  A61B1/0016 ,  A61B1/0057 ,  A61B34/70 ,  A61B34/71 ,  A61B2034/715 ,  B25J9/1085 ,  Y10T74/20323

Abstract: A continuum style manipulator is actuated by jammable media within an envelope of a module, which is also actuated by a tensile element, such as a cable and spooler motor. Multiple modules may be reversibly added. Two or more tensile elements may also be used. Three or more actuated tensile elements can actuate three DOFs of each module, and the terminal module, as well as the entire manipulator. Jammable media may be granular, actuated by a pressure change. Coarsely ground coffee works well. Rather than a jammable media, tensile elements may alternatively be used with other phase change media, such as magnetorheological and electrorheological media. A high friction angle of the granular media is desireable, and has been achieved with a particle size dispersion including both small and relatively larger particles. Applications include endoscopes, proctoscopes, laparoscopic instruments, manufacturing and medical manipulators. Methods of actuating include unjamming all modules, positioning the manipulator with tensile elements or otherwise, jamming the base-most module, and then repositioning remaining, not-jammed modules, followed by jamming the base-most not-jammed module, and so on, until all modules are positioned and jammed.

Abstract translation: 连续体式操纵器由模块的封套内的可变介质驱动，模块的外壳还由诸如电缆和后台马达的拉伸元件驱动。 可以可逆地添加多个模块。 也可以使用两个以上的拉伸元件。 三个或更多个致动的拉伸元件可以致动每个模块的三个DOF，以及终端模块以及整个操纵器。 易燃介质可能是颗粒状的，由压力变化引起。 粗磨咖啡效果很好。 而不是可燃介质，拉伸元件可以替代地与其它相变介质一起使用，例如磁流变和电流变介质。 粒状介质的高摩擦角是期望的，并且已经通过包括小的和相对较大的颗粒的粒度分散来实现。 应用包括内窥镜，摄像镜，腹腔镜仪器，制造和医疗操纵器。 执行方法包括：对所有模块进行清除，将机械手定位在拉伸元件或其他方式，使最基本的模块卡住，然后重新定位剩余的未卡住的模块，然后卡住最不卡住的模块，等等， 直到所有模块都被定位和卡住。

公开(公告)号：WO2012075306A2

公开(公告)日：2012-06-07

申请号：PCT/US2011/062914

申请日：2011-12-01

Applicant: 1366 TECHNOLOGIES INC. ,  JONCZYK, Ralf ,  SACHS, Emanuel, M.

Inventor： JONCZYK, Ralf ,  SACHS, Emanuel, M.

IPC: H01L21/28

CPC classification number: H01L31/182 ,  C04B41/4539 ,  C04B41/5096 ,  C30B11/002 ,  C30B15/00 ,  C30B15/007 ,  C30B15/32 ,  C30B29/06 ,  H01L21/02002 ,  H01L21/02532 ,  H01L31/1804 ,  Y02E10/546 ,  Y02P70/521

Abstract: An interposer sheet can be used for making semiconductor bodies, such as of silicon, such as for solar cell use. It is free-standing, very thin, flexible, porous and able to withstand the chemical and thermal environment of molten semiconductor without degradation. It is typically of a ceramic material, such as silica, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbide, silicon carbonitride, silicon oxycarbonitride and others. It is provided between a forming surface of a mold sheet, and the molten material from which a semiconductor body will be formed. It may be secured to the forming surface or deposited upon the melt. The interposer sheet suppresses grain nucleation, and limits heat flow from the melt. It promotes separation of the semiconductor body from the forming surface. It can be fabricated before its use. Because free-standing and not adhered to the forming surface, problems of mismatch of CTE are minimized. The interposer sheet and semiconductor body are free to expand and contract relatively independently of the forming surface.

Abstract translation: 插入片可用于制造诸如硅的半导体本体，例如用于太阳能电池。 它是独立的，非常薄的，柔性的，多孔的并且能够耐受熔融半导体的化学和热环境而不降解。 它通常是陶瓷材料，例如二氧化硅，氮化硅，氮氧化硅，碳氧化硅，碳化硅，碳氮化硅，碳氮氧化硅等。 设置在模板的成形表面和将形成半导体本体的熔融材料之间。 它可以固定到成形表面或沉积在熔体上。 插入片抑制晶粒成核，并限制来自熔体的热流。 它促进半导体主体与成形表面的分离。 它可以在使用之前进行制造。 由于独立且不粘附到成型表面，CTE的失配问题被最小化。 插入片和半导体本体相对于成形表面相对自由地膨胀和收缩。

公开(公告)号：WO2010129884A1

公开(公告)日：2010-11-11

申请号：PCT/US2010/034067

申请日：2010-05-07

Applicant: 1366 TECHNOLOGIES INC. ,  SACHS, Emanuel, M. ,  GABOR, Andrew, M.

Inventor： SACHS, Emanuel, M. ,  GABOR, Andrew, M.

IPC: H01L21/306 ,  H01L31/00 ,  H01L31/18

CPC classification number: H01L31/022425 ,  H01L21/76802 ,  H01L31/02363 ,  H01L31/18 ,  Y02E10/50

Abstract: A porous lift off layer facilitates removal of films from surfaces, such as semiconductors. A film is applied over a patterned porous layer, the layer comprising openings typically larger than the film thickness. The porous material and the film are then removed from areas where film is not intended. The porous layer can be provided as a slurry, dried to open porosities, or fugitive particles within a field, which disassociate upon the application of heat or solvent. The film can be removed by etchant that enters through porosities where the film does not bridge the spaces between solid portions, so that the etchant attacks both film surfaces

Abstract translation: 多孔提升层有助于从诸如半导体的表面去除膜。 将膜施加在图案化的多孔层上，该层包括通常大于膜厚度的开口。 然后将多孔材料和膜从不需要膜的区域中取出。 多孔层可以作为浆料提供，干燥以打开孔隙，或场内的逸散颗粒，其在施加热或溶剂时解离。 可以通过蚀刻剂从薄膜不固定部分之间的空隙的孔隙中进入薄膜，从而使蚀刻剂侵袭两个薄膜表面