公开(公告)号：WO2010039626A2

公开(公告)日：2010-04-08

申请号：PCT/US2009/058533

申请日：2009-09-28

Applicant: INTEL CORPORATION ,  DEES, Brian ,  GRIMSRUD, Knut ,  COULSON, Richard L.

Inventor： DEES, Brian ,  GRIMSRUD, Knut ,  COULSON, Richard L.

IPC: G06F3/06 ,  G06F9/06 ,  G06F1/04

CPC classification number: G06F3/0616 ,  G06F1/14 ,  G06F1/3287 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/4418 ,  G06F12/0866 ,  G06F12/0868 ,  G06F2212/214 ,  Y02D10/13

Abstract: Embodiments of methods to communicate a timestamp to a storage system are generally described herein. Other embodiments may be described and claimed.

Abstract translation: 这里通常描述将时间戳传送到存储系统的方法的实施例。 可以描述和要求保护其他实施例。

公开(公告)号：WO2007056106A3

公开(公告)日：2007-11-08

申请号：PCT/US2006042896

申请日：2006-11-02

Applicant: INTEL CORP ,  COULSON RICHARD ,  TRIKA SANJEEV ,  FABER ROBERT

Inventor： COULSON RICHARD ,  TRIKA SANJEEV ,  FABER ROBERT

IPC: G06F12/02 ,  G11C16/34

CPC classification number: G11C16/349 ,  G06F12/0246

Abstract: Write operations store data in different physical memory locations. Each of the physical memory locations are associated with a logical address that is shared in common among the physical addresses. Sequence information stored in the physical memory location indicates which one of the write operations occurred last. The available erased memory location can be split into a list of erased memory locations available to be used and a list of erased memory locations not available to be used. Then, on a failure, only the list of erased memory locations available to be used needs to be analyzed to reconstruct the consumption states of memory locations.

Abstract translation: 写操作将数据存储在不同的物理内存位置。 每个物理存储器位置与物理地址中共同共享的逻辑地址相关联。 存储在物理存储器位置的序列信息指示最后发生哪个写入操作。 可用的擦除的存储器位置可以被分割成可用于被使用的擦除的存储器位置的列表和不可用的擦除的存储器位置的列表。 然后，在失败的情况下，仅需要分析可用于被使用的擦除的存储器位置的列表来重构存储器位置的消耗状态。

公开(公告)号：WO2005066772A2

公开(公告)日：2005-07-21

申请号：PCT/US2004/039481

申请日：2004-11-24

Applicant: INTEL CORPORATION ,  BRANNOCK, Kirk ,  GARNEY, John ,  COULSON, Richard

Inventor： BRANNOCK, Kirk ,  GARNEY, John ,  COULSON, Richard

IPC: G06F9/445

CPC classification number: G06F9/4403 ,  G06F8/60

Abstract: Briefly, in accordance with an embodiment of the invention, an apparatus and method to store initialization and configuration information is provided. The method may include storing basic input/output system (BIOS) software in a polymer memory. The method may further include copying a first portion of the BIOS software from the polymer memory to a random access memory (RAM) buffer of a memory controller, wherein the RAM buffer has a storage capacity of at least about two kilobytes (KB).

Abstract translation: 简而言之，根据本发明的实施例，提供了存储初始化和配置信息的装置和方法。 该方法可以包括将基本输入/输出系统（BIOS）软件存储在聚合物存储器中。 该方法还可以包括将BIOS软件的第一部分从聚合物存储器复制到存储器控制器的随机存取存储器（RAM）缓冲器，其中RAM缓冲器具有至少约两千字节（KB）的存储容量。

公开(公告)号：WO2013147894A1

公开(公告)日：2013-10-03

申请号：PCT/US2012/031709

申请日：2012-03-30

Applicant: INTEL CORPORATION ,  MANGOLD, Richard P. ,  COULSON, Richard L. ,  ROYER, JR., Robert J. ,  TRIKA, Sanjeev N. ,  VOGAN, Andrew

Inventor： MANGOLD, Richard P. ,  COULSON, Richard L. ,  ROYER, JR., Robert J. ,  TRIKA, Sanjeev N. ,  VOGAN, Andrew

IPC: G11C16/34 ,  G11C16/10 ,  G06F12/00

CPC classification number: G11C16/225 ,  G06F11/1441 ,  G06F12/0246 ,  G06F2212/1032 ,  G06F2212/7205 ,  Y02D10/13

Abstract: Embodiments of the present disclosure describe devices, methods, computer-readable media and systems configurations for solid state drive management in power loss recovery. In some embodiments, an apparatus comprises non-volatile memory, and a memory controller coupled with the non-volatile memory and configured to defragment the non-volatile memory by being configured to write valid data from a first erase block into a location of a page of a second erase block, determine the valid data is associated with a secured state in the page, and erase the first erase block based on determination the valid data is associated with the secured state. Other embodiments are also disclosed and claimed.

Abstract translation: 本公开的实施例描述了在功率损耗恢复中用于固态驱动器管理的设备，方法，计算机可读介质和系统配置。 在一些实施例中，装置包括非易失性存储器，以及与非易失性存储器耦合的存储器控​​制器，并被配置为通过被配置为将有效数据从第一擦除块写入到页面的位置来对非易失性存储器进行碎片整理 确定有效数据与页面中的安全状态相关联，并且基于有效数据与安全状态相关联的确定来擦除第一擦除块。 还公开并要求保护其他实施例。

公开(公告)号：WO2013147819A1

公开(公告)日：2013-10-03

申请号：PCT/US2012/031315

申请日：2012-03-29

Applicant: INTEL CORPORATION ,  KHAN, Jawad B. ,  COULSON, Richard L.

Inventor： KHAN, Jawad B. ,  COULSON, Richard L.

IPC: G11C16/06 ,  G11C16/10

CPC classification number: G06F12/0246 ,  G06F11/1012 ,  G06F12/0253 ,  G11C11/5628 ,  G11C16/10 ,  G11C2211/5641

Abstract: Described herein are embodiments of an apparatus configured for compression-enabled blending of data, a system including the apparatus configured for compression-enabled blending of data, and a method for compression-enabled blending of data. An apparatus configured for compression-enabled blending of data may include non-volatile memory configured to operate in a single-level cell mode and a multi-level cell mode, a compression module configured to compress data to generate compressed data, and a memory controller configured to write, in response to a reduction ratio of the compressed data being less than a threshold compression ratio, a first portion of the compressed data to the non-volatile memory in the single-level cell mode, and a second portion of the compressed data to the non-volatile memory in the multi-level cell mode. Other embodiments may be described and/or claimed.

Abstract translation: 这里描述了被配置用于数据的压缩启用混合的装置的实施例，包括被配置为用于数据的压缩启用的混合的装置的系统以及用于数据压缩的混合的方法。 被配置为用于数据压缩启用的混合的装置可以包括被配置为以单级单元模式和多级单元模式操作的非易失性存储器，被配置为压缩数据以产生压缩数据的压缩模块以及存储器控制器 被配置为响应于小于阈值压缩比的压缩数据的缩小比率将压缩数据的第一部分写入单级单元模式中的非易失性存储器，并且压缩的第二部分 数据到多级单元模式下的非易失性存储器。 可以描述和/或要求保护其他实施例。

公开(公告)号：WO2010078167A3

公开(公告)日：2010-09-30

申请号：PCT/US2009069286

申请日：2009-12-22

Applicant: INTEL CORP ,  VOGAN ANDREW WAYNE ,  COULSON RICHARD

Inventor： VOGAN ANDREW WAYNE ,  COULSON RICHARD

IPC: G06F11/10 ,  G06F13/16

CPC classification number: G11B20/1833 ,  G06F11/1048 ,  G06F11/108 ,  G11B2220/61

Abstract: In some embodiments, a solid state disk includes a non-volatile memory and a controller. The controller performs ECC on data stored on the non-volatile memory, and performs a parity operation on the data if the ECC cannot correct the data. Other embodiments are described and claimed.

Abstract translation: 在一些实施例中，固态盘包括非易失性存储器和控制器。 控制器对存储在非易失性存储器上的数据执行ECC，并且如果ECC不能纠正数据，则对数据执行奇偶校验操作。 描述并要求保护其他实施例。

公开(公告)号：WO2006094390A1

公开(公告)日：2006-09-14

申请号：PCT/CA2006/000325

申请日：2006-03-07

Applicant: UVIEW ULTRAVIOLET SYSTEMS INC. ,  TRIGIANI, Phil ,  FERRARO, Tony ,  COULSON, Richard, Robert

Inventor： TRIGIANI, Phil ,  FERRARO, Tony ,  COULSON, Richard, Robert

IPC: F21L4/00 ,  F21V23/00 ,  F21V17/00 ,  F21V15/01

CPC classification number: F21L4/027 ,  F21L4/085 ,  F21Y2115/10

Abstract: The present specification discloses a work light having a tray for holding or positioning light components such as a light source, power source and electrical control unit. The components can easily be assembled on the tray for operation of the light. The tray can be compartmentalized by including barriers into which the modular components of the light fit. Such barriers provide for very simple assembly or replacement of the components and protect the components by limiting their movement with respect to each other. In an embodiment the tray contains a compartment for holding an electronic control unit. The tray can contain a battery compartment which can hold a battery powered power source. The tray can also contain a light source compartment for holding a light source. The tray can be supported by a housing or casing containing a light transmissible portion which surrounds at least a portion of the tray. A cap having a hollow shell body with an opening at one end can be used to close the end of the housing. In an embodiment the cap can have a rotatable hook, which extends away from the work light, that can be used to suspend the work light in a work environment.

Abstract translation: 本说明书公开了一种工作灯，其具有用于保持或定位诸如光源，电源和电气控制单元的光部件的托盘。 组件可以容易地组装在托盘上用于操作光。 托盘可以通过包括光的模块化部件所适配的障碍物来划分。 这种障碍提供非常简单的组件或组件更换，并通过限制它们相对于彼此的运动来保护组件。 在一个实施例中，托盘包含用于保持电子控制单元的隔间。 托盘可以容纳可容纳电池供电电源的电池盒。 托盘还可以包含用于保持光源的光源室。 托盘可以由包含至少一部分托盘的透光部分的壳体或壳体支撑。 具有在一端具有开口的中空壳体的盖可用于封闭壳体的端部。 在一个实施例中，盖可以具有可远离工作光延伸的可旋转钩，其可用于将工作灯悬挂在工作环境中。

公开(公告)号：WO2010080257A3

公开(公告)日：2010-09-02

申请号：PCT/US2009066612

申请日：2009-12-03

Applicant: INTEL CORP ,  COULSON RICHARD ,  FAZIO ALBERT ,  KHAN JAWAD

Inventor： COULSON RICHARD ,  FAZIO ALBERT ,  KHAN JAWAD

IPC: G06F11/08 ,  G06F12/16

CPC classification number: G11C16/3404 ,  G06F11/1068 ,  G11C29/52 ,  G11C2029/0411

Abstract: When an error correction code (ECC) unit finds uncorrectable errors in a solid state non-volatile memory device, a process may be used in an attempt to locate and correct the errors. This process may first identify 'low confidence' memory cells that are likely to contain errors, and then determine what data is more likely to be correct in those cells, based on various criteria. The new data may then be checked with the ECC unit to verify that it is sufficiently correct for the ECC unit to correct any remaining errors.

Abstract translation: 当纠错码（ECC）单元在固态非易失性存储器件中发现不可纠正的错误时，可以使用一个过程来尝试定位和校正错误。 该过程可以首先识别可能包含错误的“低置信度”存储器单元，然后基于各种标准确定哪些数据在这些单元中更可能是正确的。 然后可以用ECC单元检查新数据，以验证ECC单元足够正确以校正任何剩余的错误。

公开(公告)号：WO2010039626A3

公开(公告)日：2010-07-01

申请号：PCT/US2009058533

申请日：2009-09-28

Applicant: INTEL CORP ,  DEES BRIAN ,  GRIMSRUD KNUT ,  COULSON RICHARD L

Inventor： DEES BRIAN ,  GRIMSRUD KNUT ,  COULSON RICHARD L

IPC: G06F3/06 ,  G06F1/04 ,  G06F9/06

CPC classification number: G06F3/0616 ,  G06F1/14 ,  G06F1/3287 ,  G06F3/0625 ,  G06F3/0659 ,  G06F3/0679 ,  G06F9/4418 ,  G06F12/0866 ,  G06F12/0868 ,  G06F2212/214 ,  Y02B60/1225 ,  Y02D10/13

Abstract: Embodiments of methods to communicate a timestamp to a storage system are generally described herein. Other embodiments may be described and claimed.

Abstract translation: 这里总体描述了将时间戳传递到存储系统的方法的实施例。 其他实施例可以被描述和要求保护。

公开(公告)号：WO2010002666A2

公开(公告)日：2010-01-07

申请号：PCT/US2009/048480

申请日：2009-06-24

Applicant: INTEL CORPORATION ,  COULSON, Richard, L.

Inventor： COULSON, Richard, L.

IPC: G11C16/02 ,  G11C16/34 ,  G11C16/10 ,  G11C16/12

CPC classification number: G11C16/3418 ,  G11C16/3431 ,  G11C2029/0407

Abstract: Disclosed herein is a method and apparatus to refresh/rewrite the data in a NAND solid state storage device ("SSD") only when it needs to be re-written. Upon power-up, the SSD assumes that it may have been a long time since some of its data was last written, and a background task to scan through all the data is started in the SSD. During idle periods, the entire contents of the drive is read. If a location is read and it has more than "bit error threshold" bits (for example 3 bits if there is capability to correct 8 bits) in error before error correction is applied, it is assumed that this memory location is retaining the data only marginally, and the corrected data should be re-written to a new location, or alternatively re-written in the same location. The corrected data is then re-written to a new location or the same location.

Abstract translation: 本文公开了仅在需要重新写入NAND固态存储设备（“SSD”）时刷新/重写数据的方法和装置。 上电时，SSD假定自从上一次写入数据以来可能已经有很长时间了，而在SSD中开始扫描所有数据的后台任务。 在空闲期间，读取驱动器的全部内容。 如果读取位置，并且在应用错误校正之前，它具有超过“位错误阈值”位（例如，如果有能力校正8位的3位），则假定该存储器位置仅保留数据 稍微修正后的数据应重新写入新的位置，或者重新写入同一位置。 然后将更正的数据重新写入新位置或相同位置。