公开(公告)号：WO2012109644A2

公开(公告)日：2012-08-16

申请号：PCT/US2012024834

申请日：2012-02-13

Applicant: EVERGREEN ENERGY INC ,  BENZ AUGUST D ,  ELLIOTT WILLIAM

Inventor： BENZ AUGUST D ,  ELLIOTT WILLIAM

IPC: C10L9/08 ,  C02F1/00 ,  C10L9/00

CPC classification number: C10G1/06 ,  C10G2300/4081 ,  Y10T137/0318 ,  Y10T137/794

Abstract: Methods and apparatus are arranged to increase thermal efficiency, reduce waste water treatment, reduce net usage of fresh water, and improve operational reliability during direct hydrothermal upgrading of carbonaceous materials, including low-rank coals. Drain water collected from the hydrothermal upgrading system is passed through a reboiler system to generate steam which can be returned to the hydrothermal processor system for use therein.

Abstract translation: 安排方法和装置，以提高热效率，减少废水处理，减少淡水净用量，提高包括低级煤在内的碳质材料的直接水热升级过程中的运行可靠性。 从水热升级系统收集的排水通过再沸器系统产生可以返回到水热处理器系统中使用的蒸汽。

公开(公告)号：WO2008137076A1

公开(公告)日：2008-11-13

申请号：PCT/US2008/005689

申请日：2008-05-02

Applicant: LUMINATOR HOLDING, L.P. ,  ZLOTNIKOV, Vadim ,  KELLEHER, Dan ,  SOLBERG, Kent ,  BERGER, Valeriy, K. ,  POLLAEHN, Louis ,  BERMAN, George ,  ELLIOTT, William ,  MASIAS, Marty ,  TAYLOR, Larry, T. ,  GUNTER, John, B.

Inventor： ZLOTNIKOV, Vadim ,  KELLEHER, Dan ,  SOLBERG, Kent ,  BERGER, Valeriy, K. ,  POLLAEHN, Louis ,  BERMAN, George ,  ELLIOTT, William ,  MASIAS, Marty ,  TAYLOR, Larry, T. ,  GUNTER, John, B.

IPC: F21V7/04

CPC classification number: F21V29/74 ,  B60Q3/43 ,  F21S2/005 ,  F21S4/20 ,  F21S4/28 ,  F21S45/47 ,  F21V3/00 ,  F21V3/04 ,  F21V3/049 ,  F21V3/0615 ,  F21V3/0625 ,  F21V5/002 ,  F21V7/0008 ,  F21V7/04 ,  F21V7/048 ,  F21V7/22 ,  F21V13/02 ,  F21V19/0045 ,  F21V21/34 ,  F21V29/745 ,  F21V29/76 ,  F21Y2103/10 ,  F21Y2113/13 ,  F21Y2115/10

Abstract: A lighting system including a light-emitting diode cradle securing at least one light-emitting diode and a modular unit comprising an arcuate portion, the arcuate portion comprising at least one diffusive reflective surface adapted to receive and reflect light from the at least one light-emitting diode. The lighting system further includes a diffusive transmissive element adapted to receive light reflected by the diffusive reflective surface and provide diffused light to an area requiring illumination.

Abstract translation: 一种照明系统，包括固定至少一个发光二极管的发光二极管支架和包括弧形部分的模块化单元，所述弧形部分包括至少一个扩散反射表面，所述扩散反射表面适于接收和反射来自所述至少一个发光二极管的光， 发光二极管。 照明系统还包括漫射透射元件，其适于接收由漫射反射表面反射的光并且向需要照明的区域提供漫射光。

公开(公告)号：WO2008010908A3

公开(公告)日：2008-04-17

申请号：PCT/US2007015281

申请日：2007-07-09

Applicant: QUICKFILTER TECHNOLOGIES INC ,  LEONARD JERAMY ,  ELLIOTT WILLIAM ,  MAGDEBURGER THOMAS

Inventor： LEONARD JERAMY ,  ELLIOTT WILLIAM ,  MAGDEBURGER THOMAS

IPC: H03M1/12

CPC classification number: H03H17/0294 ,  H03H17/06

Abstract: An analog-to-digital conversion system has an analog-to-digital converter (300) and a digital-filter system (100). The digital-filter system (100) is connected to the output of the analog-to-digital converter (300). A processor (310) is connected to the output of the digital-filter system (100) so that the processor (310) transparently receives filtered sample data in the native format of the analog-to-digital converter (300). An FIR filter circuit (130) in the digital-filter system (100) is connected to receive data from, and output filtered data to, a sample capture and data-type conversion circuit (120) connected between the analog-to-digital converter (300) and the processor (310). A configuration and control-register circuit (110) is connected to the circuit for sample collection and data-type conversion (120), and to the FIR filter circuit (130), for selectively controlling the operation of the digital filter system (100) according to parameters for data conversion and filter operation passed to the configuration and control-register circuit (110) over a serial interface.

Abstract translation: 模拟 - 数字转换系统具有模数转换器（300）和数字滤波器系统（100）。 数字滤波器系统（100）连接到模拟 - 数字转换器（300）的输出端。 处理器（310）连接到数字滤波器系统（100）的输出，使得处理器（310）以模数转换器（300）的本机格式透明地接收滤波后的采样数据。 数字滤波器系统（100）中的FIR滤波器电路（130）被连接以从滤波数据接收数据，并将滤波后的数据输出到连接在模数转换器之间的采样捕获和数据类型转换电路（120） （300）和处理器（310）。 配置和控制寄存器电路（110）连接到用于采样和数据类型转换的电路（120）和FIR滤波器电路（130），用于选择性地控制数字滤波器系统（100）的操作， 根据用于通过串行接口传送到配置和控制寄存器电路（110）的数据转换和滤波操作的参数。

公开(公告)号：WO2012109644A3

公开(公告)日：2012-08-16

申请号：PCT/US2012/024834

申请日：2012-02-13

Applicant: EVERGREEN ENERGY INC. ,  BENZ, August, D. ,  ELLIOTT, William

Inventor： BENZ, August, D. ,  ELLIOTT, William

IPC: C10L9/08 ,  C10L9/00 ,  C02F1/00

Abstract: Methods and apparatus are arranged to increase thermal efficiency, reduce waste water treatment, reduce net usage of fresh water, and improve operational reliability during direct hydrothermal upgrading of carbonaceous materials, including low-rank coals. Drain water collected from the hydrothermal upgrading system is passed through a reboiler system to generate steam which can be returned to the hydrothermal processor system for use therein.

公开(公告)号：WO2007027690A3

公开(公告)日：2007-05-18

申请号：PCT/US2006033723

申请日：2006-08-29

Applicant: QUICKFILTER TECHNOLOGIES INC ,  WANG SHENQ-HUEY ,  ELLIOTT WILLIAM ,  MENG ZIEMEI

Inventor： WANG SHENQ-HUEY ,  ELLIOTT WILLIAM ,  MENG ZIEMEI

IPC: H03M7/00 ,  G06F17/17

CPC classification number: H03H17/0671 ,  H03H2017/0678

Abstract: We disclose a CIC digital filter having an arbitrary-integer decimation rate. The filter has a shifter (110) connected to its input. The shifter (110) receives a shift control input, where the shift control input is pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the CIC filter. There is a multiplier (100) connected between the input and the shifter (110). In other embodiments, the multiplier (100) could be connected between the input and the shifter (110). Sequentially-connected integrator (130) functions are connected to the shifter (110) or multiplier (100); a decimation function receives input from the integrator (130) functions; and sequentially-connected differentiator (150) functions receive input from the decimation function. The decimation function has a selectable rate equal to any integer between 1 and a number equal to the predetermined maximum decimation value. The multiplier (100) is configured to compute the product of each input data sample by a correction factor; the correction factor being pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the CIC filter, so as to correct the gain of the CIC filter for decimation values not a power of 2.

Abstract translation: 我们公开了具有任意整数抽取率的CIC数字滤波器。 滤波器具有连接到其输入的移位器（110）。 移位器（110）接收移位控制输入，其中移位控制输入被预先计算为等于2的整数部分，升高到CIC滤波器的增益的基数2对数。 在输入端和移位器（110）之间连接有乘法器（100）。 在其他实施例中，乘法器（100）可以连接在输入端和移位器（110）之间。 顺序连接的积分器（130）功能连接到移位器（110）或乘法器（100）。 抽取功能接收来自积分器（130）功能的输入; 和顺序连接的微分器（150）函数接收来自抽取函数的输入。 抽取函数具有等于1和等于预定最大抽取值的数量之间的任何整数的可选择速率。 乘法器（100）被配置为通过校正因子计算每个输入数据样本的乘积; 校正因子被预先计算为等于2的分数部分，该分数部分被升高到CIC滤波器的增益的基数2对数，以便校正CIC滤波器对于不是2的幂的抽取值的增益。

公开(公告)号：WO2004014386A1

公开(公告)日：2004-02-19

申请号：PCT/IB2003/003388

申请日：2003-07-28

Applicant: WARNER-LAMBERT COMPANY LLC ,  ELLIOTT, William, Leon ,  FRY, David, William

Inventor： ELLIOTT, William, Leon ,  FRY, David, William

IPC: A61K31/5377

CPC classification number: A61K45/06 ,  A61K31/337 ,  A61K31/5377 ,  A61K31/70 ,  A61K31/7072 ,  A61K33/24 ,  A61K41/00 ,  A61K2300/00

Abstract: Administration of an irreversible tyrosine kinase inhibitor such as CI-1033 in combination with one or more other antineoplastic agent(s), or ionizing radiation is synergistic for treating cancer.

Abstract translation: 施用不可逆的酪氨酸激酶抑制剂如CI-1033与一种或多种其它抗肿瘤剂或电离辐射组合对于治疗癌症是协同的。

公开(公告)号：WO2008010908A2

公开(公告)日：2008-01-24

申请号：PCT/US2007/015281

申请日：2007-07-09

Applicant: QUICKFILTER TECHNOLOGIES, INC. ,  LEONARD, Jeramy ,  ELLIOTT, William ,  MAGDEBURGER, Thomas

Inventor： LEONARD, Jeramy ,  ELLIOTT, William ,  MAGDEBURGER, Thomas

IPC: H03M1/66

CPC classification number: H03H17/0294 ,  H03H17/06

Abstract: An analog-to-digital conversion system has an analog-to-digital converter (300) and a digital-filter system (100). The digital-filter system (100) is connected to the output of the analog-to-digital converter (300). A processor (310) is connected to the output of the digital-filter system (100) so that the processor (310) transparently receives filtered sample data in the native format of the analog-to-digital converter (300). An FIR filter circuit (130) in the digital-filter system (100) is connected to receive data from, and output filtered data to, a sample capture and data-type conversion circuit (120) connected between the analog-to-digital converter (300) and the processor (310). A configuration and control-register circuit (110) is connected to the circuit for sample collection and data-type conversion (120), and to the FIR filter circuit (130), for selectively controlling the operation of the digital filter system (100) according to parameters for data conversion and filter operation passed to the configuration and control-register circuit (110) over a serial interface.

Abstract translation: 模拟 - 数字转换系统具有模数转换器（300）和数字滤波器系统（100）。 数字滤波器系统（100）连接到模拟 - 数字转换器（300）的输出端。 处理器（310）连接到数字滤波器系统（100）的输出，使得处理器（310）以模数转换器（300）的原生格式透明地接收滤波的采样数据。 数字滤波器系统（100）中的FIR滤波器电路（130）被连接以从样本捕获和数据类型转换电路（120）接收数据并将其输出到连接在模数转换器 （300）和处理器（310）。 配置和控制寄存器电路（110）连接到用于采样和数据类型转换的电路（120），并连接到FIR滤波器电路（130），用于选择性地控制数字滤波器系统（100）的操作， 根据用于通过串行接口传递到配置和控制寄存器电路（110）的数据转换和滤波器操作的参数。

公开(公告)号：WO2007027690A2

公开(公告)日：2007-03-08

申请号：PCT/US2006/033723

申请日：2006-08-29

Applicant: QUICKFILTER TECHNOLOGIES, INC. ,  WANG, Shenq-Huey ,  ELLIOTT, William ,  MENG, Ziemei

Inventor： WANG, Shenq-Huey ,  ELLIOTT, William ,  MENG, Ziemei

IPC: H03M7/00

CPC classification number: H03H17/0671 ,  H03H2017/0678

Abstract: We disclose a CIC digital filter having an arbitrary-integer decimation rate. The filter has a shifter (110) connected to its input. The shifter (110) receives a shift control input, where the shift control input is pre-computed as equal to the integer portion of 2 raised to the base-2 logarithm of the gain of the CIC filter. There is a multiplier (100) connected between the input and the shifter (110). In other embodiments, the multiplier (100) could be connected between the input and the shifter (110). Sequentially-connected integrator (130) functions are connected to the shifter (110) or multiplier (100); a decimation function receives input from the integrator (130) functions; and sequentially-connected differentiator (150) functions receive input from the decimation function. The decimation function has a selectable rate equal to any integer between 1 and a number equal to the predetermined maximum decimation value. The multiplier (100) is configured to compute the product of each input data sample by a correction factor; the correction factor being pre-computed as equal to the fractional portion of 2 raised to the base-2 logarithm of the gain of the CIC filter, so as to correct the gain of the CIC filter for decimation values not a power of 2.

Abstract translation: 我们公开了具有任意整数抽取率的CIC数字滤波器。 滤波器具有连接到其输入端的移位器（110）。 移位器（110）接收移位控制输入，其中移位控制输入被预先计算为等于2的整数部分升高到CIC滤波器的增益的基数2对数。 连接在输入和移位器（110）之间的乘法器（100）。 在其他实施例中，乘法器（100）可以连接在输入和移位器（110）之间。 顺序连接的积分器（130）功能连接到移位器（110）或乘法器（100）; 抽取功能从积分器（130）接收输入功能; 并且顺序连接的微分器（150）功能接收来自抽取功能的输入。 抽取功能具有等于1和等于预定最大抽取值的数字之间的任何整数的可选择速率。 乘法器（100）被配置为通过校正因子来计算每个输入数据样本的乘积; 校正因子被预先计算为等于2的分数部分提高到CIC滤波器的增益的基数2对数，以便校正CIC滤波器对于不是2的幂的抽取值的增益。