Abstract:
A comparator circuit (5) comprising a fully differential main amplifier unit (10, 10b). The main amplifier unit (10, 10b) comprises a control port and is adapted to control a bias current of a first branch of the main amplifier unit (10, 10b) and/or a bias current of a second branch of the main amplifier unit (10, 10b) in response to one or more control voltages supplied to the control port of the main amplifier unit (10, 10b). The comparator circuit (5) comprises circuitry (60) for balancing the voltages at the positive and negative input terminals (12a, 12b) of the main amplifier unit (10, 10b) during a first clock phase of the comparator circuit (5). Furthermore, the comparator circuit (10, 10a) comprises a switched-capacitor accumulator unit with a differential input. The switched-capacitor accumulator unit is operatively connected to the positive and negative output terminals (14a, 14b) of the main amplifier unit (10, 10b) for sampling voltages at the positive and negative output terminals (14a, 14b) of the main amplifier unit (10, 10b) during the first clock phase, and operatively connected to the control port of the main amplifier unit (10, 10b) for supplying said one or more control voltages.
Abstract:
The present invention relates to an autocalibrating analog-to-digital converter and a sensor device comprising such a converter. The analog-to-digital converter comprises a first analog-to-digital converter of the type measured-value-to-pulse-amount converter and a second analog-to-digital converter, which converts the residual value of the first converter at the end of the period to a digital value while using reference values, and an adder, which adds the residual value to the output signal from the first converter. Functions or components of the second analog-to-digital converter are automatically calibrated by means of calibration values measured by the analog-to-digital converter involved, comprising the first and the second analog-to-digital converter, and another example of an analog-to-digital converter of the same composition.
Abstract:
The invention relates to a sensor device comprising an array of detectors. In such a detector array, it is difficult to read out weak electric signals, especially if there are many detectors. The invention solves the contemplated problem by using a device in which each detector consists of a radiation-sensitive component included in an oscillator, for example a resistor or a capacitor included in an RC oscillator, whose frequency is used as a measure of the detected quantity.
Abstract:
An A/D converter stage including an A/D sub-converter connected to a D/A sub-converter (12) is calibrated by a method that inserts a calibration test sequence into the D/A sub-converter. This is accomplished by forcing (SW) the comparators (COMP1-COMP7) of the A/D sub-converter to generate and insert the sequence into the D/A sub-converter.
Abstract:
The invention relates to a method of producing transgenic plant material by transforming a plant with a vector comprising an essential gene having mutations at two sites at least. The method is exemplified with EPSPS as the essential gene. The method makes it possible to use an antisense molecule directed to the native form of said gene for selection of transformed plants. The application relates further to a plant obtainable by the method, a binary vector system containing the mutated essential gene, said mutations being silent mutations. Furthermore, the application discloses the use of an antisense molecule directed to an essential gene as a herbicide in particular using an aqueous solution comprising a saccharide such as sucrose, fructose and glucose.
Abstract:
Provided are nucleotide sequences which encodes a sugar-signalling transcription factors capable of activating a promoter of a gene encoding an enzyme involved in the synthesis or deposition of starch e.g. in response to sugar levels in a plant. Preferred sequences encode WRKY proteins such as the sugar signaling in barley2 (SUSIBA2) factor and variants thereof, and act on promoters which compriseat least one SURE element and\or W box element to which the transcription factor binds (e.g. promoters such as iso1, sbe1, sbeIIb, ssI, agpaseS). The invention also provides related methods and materials e.g. for activating, modulating, and investigating the elements present in such promoters.
Abstract:
Provided are nucleotide sequences which encodes a sugar-signalling transcription factors capable of activating a promoter of a gene encoding an enzyme involved in the synthesis or deposition of starch e.g. in response to sugar levels in a plant. Preferred sequences encode WRKY proteins such as the su gar si gnaling in ba rley2 (SUSIBA2) factor and variants thereof, and act on promoters which compriseat least one SURE element and\or W box element to which the transcription factor binds (e.g. promoters such as iso1 , sbe1, sbeIIb, ssI, agpaseS ). The invention also provides related methods and materials e.g. for activating, modulating, and investigating the elements present in such promoters.
Abstract:
An A/D converter includes at least one comparator array (COMP1-COMP7) for flash A/D conversion of an analog signal. Means (CCU, SW1-SW7) pro-vide, for each comparator in the array, a common reference signal to both comparator input terminals. Means (CCU, DAC1-DAC7) force each compara-tor in the array into the same logical output state. Finally, means (CCU, DAC1-DAC7) adjust the comparator trip-point for each comparator by a ramp signal until the logical output state is inverted.
Abstract:
A method of determining at least one calibration value for a redundant analog-to-digital- converter, ADC, is disclosed. For at least an i:th bit bL, the corresponding bit weight w i is less than the sum of the bit weights W j , j = 0,1,..., i — 1 corresponding to the bits b j , j = 0,1,..., i — 1 with lesser significance than the bit b i . The method comprises sampling a first electrical value representative of the bit weight w i ; performing a first analog-to-digital, A/D, conversion using the bits b j , j = 0,1,..., i — 1 with lesser significance than the bit b i to obtain a first digital word of said bits b j , j = 0,1,..., i — 1 with lesser significance than the bit b i representing said first electrical value; and estimating the value of the bit weight W i expressed in terms of the bit weights W j . j = 0,1,..., i — 1 corresponding to the bits b j , j = 0,1,..., i — 1 with lesser significance than the bit b i based at least on said first digital word, wherein the resulting estimated value of the bit weight w i is one of the at least one calibration value. A control unit, a redundant ADC and a computer program are also disclosed.
Abstract:
A D/A converter range calibration system in an A/D converter structure including a set of comparators with associated calibrating D/A converters includes means (RCC) for determining the offset error range for the entire set of comparators and means (R-DAC) for adjusting the dynamic range of each calibrating D/A converter to this offset error range.