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公开(公告)号：WO2008055184A2
公开(公告)日：2008-05-08
申请号：PCT/US2007/083063
申请日：2007-10-30
Applicant: ATMEL CORPORATION , SIVERO, Stefano , MARSELLA, Mirella , CHINOSI, Mauro , BOSISIO, Giorgio
Inventor： SIVERO, Stefano , MARSELLA, Mirella , CHINOSI, Mauro , BOSISIO, Giorgio
IPC: G11C16/12
CPC classification number: G11C16/12
Abstract: A signal generator circuit is configured to generate program signals for a memory array. The program signals are applied to word lines in the memory array, and have a transient state based on a coupling characteristic of the word lines and selector gates. The transient state is configured to minimize coupling between the word lines and the gates of the selectors so that a state of each selector remains unchanged during the transient state.
Abstract translation: 信号发生器电路被配置为产生用于存储器阵列的程序信号。 程序信号被施加到存储器阵列中的字线，并且基于字线和选择器门的耦合特性具有瞬态状态。 瞬态状态被配置为最小化字线和选择器的栅极之间的耦合，使得每个选择器的状态在过渡状态期间保持不变。
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公开(公告)号：WO2006119404A3
公开(公告)日：2007-04-05
申请号：PCT/US2006017096
申请日：2006-05-03
Applicant: ATMEL CORP , SURICO STEFANO , BARTOLI SIMONE , MARSELLA MIRELLA , BOSISIO GIORGIO
Inventor： SURICO STEFANO , BARTOLI SIMONE , MARSELLA MIRELLA , BOSISIO GIORGIO
IPC: G06F12/00
CPC classification number: G11C16/20 , G11C16/04 , G11C29/02 , G11C29/021 , G11C29/028 , G11C2029/4402
Abstract: Method and system for configuring parameters used in flash memory devices. A load instruction and associated address are retrieved from a read-only memory, and the address is used to select a configuration register storing a configuration value. The configuration value is loaded to an associated dedicated register to configure a parameter of the flash memory in a flash memory operation. In another aspect, one or more selected configuration values not stored in a ROM are changed if a tested flash memory operation is not within desired specifications.
Abstract translation: 用于配置闪存设备中使用的参数的方法和系统。 从只读存储器检索加载指令和相关联的地址，并且该地址用于选择存储配置值的配置寄存器。 配置值加载到相关联的专用寄存器，以在闪存操作中配置闪存的参数。 在另一方面，如果测试的闪速存储器操作不在期望的规范内，则不存储在ROM中的一个或多个选择的配置值被改变。
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3.发明申请METHOD AND SYSTEM FOR PROGRAM PULSE GENERATION DURING PROGRAMMING OF NONVOLATILE ELECTRONIC DEVICES 审中-公开非线性电子设备编程过程中的程序脉冲生成方法与系统
公开(公告)号：WO2006119327A2
公开(公告)日：2006-11-09
申请号：PCT/US2006/016902
申请日：2006-05-03
Applicant: ATMEL CORPORATION , SURICO, Stefano , MARSELLA, Mirella , MARZIANI, Monica , CHINOSI, Mauro
Inventor： SURICO, Stefano , MARSELLA, Mirella , MARZIANI, Monica , CHINOSI, Mauro
IPC: G11C11/34
CPC classification number: G11C16/12 , G11C16/3468
Abstract: Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.
Abstract translation: 在非易失性电子设备的编程期间，用于编程脉冲产生的方面包括提供可配置电压序列发生器，用于在用于非易失性电子设备的编程算法的修改操作期间根据需要管理验证脉冲和脉冲验证切换，其中产生更有效的修改操作。 以这种方式，可以容易地由微控制器管理的高度灵活的位序列生成，导致更短的代码长度，更快的执行时间以及在不同器件中的重用性。 更具体地，引入完全兼容的电压序列生成，其可以应用于被修改的闪存单元的端子，并且允许对脉冲验证和验证脉冲切换进行有效且省时的管理。
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4.发明申请METHOD AND SYSTEM FOR PROGRAM PULSE GENERATION DURING PROGRAMMING OF NONVOLATILE ELECTRONIC DEVICES 审中-公开非线性电子设备编程过程中的程序脉冲发生方法与系统
公开(公告)号：WO2006119327A3
公开(公告)日：2007-12-13
申请号：PCT/US2006016902
申请日：2006-05-03
Applicant: ATMEL CORP , SURICO STEFANO , MARSELLA MIRELLA , MARZIANI MONICA , CHINOSI MAURO
Inventor： SURICO STEFANO , MARSELLA MIRELLA , MARZIANI MONICA , CHINOSI MAURO
IPC: G11C11/34
CPC classification number: G11C16/12 , G11C16/3468
Abstract: Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.
Abstract translation: 在非易失性电子设备的编程期间，用于编程脉冲产生的方面包括提供可配置的电压序列发生器，用于在非易失性电子设备的编程算法的修改操作期间根据需要管理验证脉冲和脉冲验证切换，其中产生更有效的修改操作。 以这种方式，可以容易地由微控制器管理的高度灵活的位序列生成，导致更短的代码长度，更快的执行时间以及在不同器件中的重用性。 更具体地，引入完全兼容的电压序列生成，其可以应用于正被修改的闪存单元的端子，并且允许对脉冲验证和验证脉冲切换的有效且省时的管理。
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5.发明申请SYSTEM AND METHOD FOR PRESERVING AN ERROR MARGIN FOR A NON-VOLATILE MEMORY 审中-公开用于保存非易失性存储器的错误标志的系统和方法
公开(公告)号：WO2006026309A3
公开(公告)日：2007-08-16
申请号：PCT/US2005030143
申请日：2005-08-23
Applicant: ATMEL CORP , FRULIO MASSIMILIANO , TASSAN CASER FABIO , BEDARIDA LORENZO , MARSELLA MIRELLA
Inventor： FRULIO MASSIMILIANO , TASSAN CASER FABIO , BEDARIDA LORENZO , MARSELLA MIRELLA
IPC: G11C16/06
Abstract: A system and method for preserving an error margin for a nonvolatile memory that includes a memory cell, a reference cell coupled to a reference current mirror configured to mirror current through the reference cell. The system comprises a memory current mirror coupled to the memory cell and configured to mirror current through the memory cell. A sense amplifier has a first and a second input. The first input is coupled to the reference current mirror and the second input is coupled to the memory current mirror. The sense amplifier is configured to compare a voltage across the memory cell with a voltage across the reference cell.
Abstract translation: 一种用于保持非易失性存储器的误差容限的系统和方法，所述非易失性存储器包括存储器单元，耦合到参考电流镜的参考单元，所述参考电池被配置为镜像通过所述参考单元的 该系统包括耦合到存储器单元并被配置为镜像通过存储器单元的电流的存储器电流镜。 读出放大器具有第一和第二输入。 第一输入耦合到参考电流镜，第二输入耦合到存储器电流镜。 读出放大器被配置为将存储器单元两端的电压与参考单元两端的电压进行比较。
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Patent Agency Ranking6.发明申请APPARATUS AND METHOD FOR PROVIDING A TEMPERATURE COMPENSATED REFERENCE CURRENT 审中-公开提供温度补偿参考电流的装置和方法
公开(公告)号：WO2008045412A2
公开(公告)日：2008-04-17
申请号：PCT/US2007/021535
申请日：2007-10-09
Applicant: ATMEL CORPORATION , PASSERINI, Marco , SIVERO, Stefano , MARSELLA, Mirella , MOSTOLA, Maria
Inventor： PASSERINI, Marco , SIVERO, Stefano , MARSELLA, Mirella , MOSTOLA, Maria
IPC: G05F1/10
CPC classification number: G05F3/30
Abstract: An apparatus and method for providing a temperature compensated reference current in an electronic device is disclosed. The temperature compensated reference current is compensated for temperature and other circuit variations. The reference current is provided by an improved reference current generator and may be used in a memory device or any other desired circuit.
Abstract translation: 公开了一种用于在电子设备中提供温度补偿参考电流的装置和方法。 温度补偿参考电流补偿温度和其他电路变化。 参考电流由改进的参考电流发生器提供，并且可以用在存储器件或任何其它期望的电路中。
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公开(公告)号：WO2006119404A2
公开(公告)日：2006-11-09
申请号：PCT/US2006/017096
申请日：2006-05-03
Applicant: ATMEL CORPORATION , SURICO, Stefano , BARTOLI, Simone , MARSELLA, Mirella , BOSISIO, Giorgio
Inventor： SURICO, Stefano , BARTOLI, Simone , MARSELLA, Mirella , BOSISIO, Giorgio
IPC: G06F12/00
CPC classification number: G11C16/20 , G11C16/04 , G11C29/02 , G11C29/021 , G11C29/028 , G11C2029/4402
Abstract: Method and system for configuring parameters used in flash memory devices. A load instruction and associated address are retrieved from a read-only memory, and the address is used to select a configuration register storing a configuration value. The configuration value is loaded to an associated dedicated register to configure a parameter of the flash memory in a flash memory operation. In another aspect, one or more selected configuration values not stored in a ROM are changed if a tested flash memory operation is not within desired specifications.
Abstract translation: 用于配置闪存设备中使用的参数的方法和系统。 从只读存储器检索加载指令和相关联的地址，并且该地址用于选择存储配置值的配置寄存器。 配置值加载到相关联的专用寄存器，以在闪存操作中配置闪存的参数。 在另一方面，如果测试的闪速存储器操作不在期望的规范内，则不存储在ROM中的一个或多个选择的配置值被改变。
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8.发明申请
公开(公告)号：WO2008100602A1
公开(公告)日：2008-08-21
申请号：PCT/US2008/002057
申请日：2008-02-15
Applicant: ATMEL CORPORATION , REGGIORI, Riccardo , TASSAN CASER, Fabio , MARSELLA, Mirella , MARZIANI, Monica
Inventor： REGGIORI, Riccardo , TASSAN CASER, Fabio , MARSELLA, Mirella , MARZIANI, Monica
CPC classification number: G11C29/32 , G11C16/04 , G11C29/1201 , G11C29/16 , G11C29/4401 , G11C29/789 , G11C2029/3602
Abstract: A flash memory device includes a flash memory array, a set of non-volatile redundancy registers, a serial interface, and testing logic coupled to the serial interface, the testing logic configured to accept a set of serial commands from an external tester; erase the array; program the array with a test pattern; read the array and compare the results with expected results to identify errors; determine whether the errors can be repaired by substituting a redundant row or column of the array, and if so, generate redundancy information; and program the redundancy information into the non-volatile redundancy registers.
Abstract translation: 闪速存储器件包括闪存阵列，一组非易失性冗余寄存器，串行接口和耦合到串行接口的测试逻辑，该测试逻辑被配置为从外部测试器接收一组串行命令; 擦除数组; 使用测试模式对阵列进行编程; 读取阵列并将结果与预期结果进行比较以识别错误; 通过替换阵列的冗余行或列来确定是否可以修复错误，如果是，则生成冗余信息; 并将冗余信息编程到非易失性冗余寄存器中。
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公开(公告)号：WO2008055184A3
公开(公告)日：2008-06-19
申请号：PCT/US2007083063
申请日：2007-10-30
Applicant: ATMEL CORP , SIVERO STEFANO , MARSELLA MIRELLA , CHINOSI MAURO , BOSISIO GIORGIO
Inventor： SIVERO STEFANO , MARSELLA MIRELLA , CHINOSI MAURO , BOSISIO GIORGIO
IPC: G11C16/12
CPC classification number: G11C16/12
Abstract: A signal generator circuit is configured to generate program signals for a memory array. The program signals are applied to word lines in the memory array, and have a transient state based on a coupling characteristic of the word lines and selector gates. The transient state is configured to minimize coupling between the word lines and the gates of the selectors so that a state of each selector remains unchanged during the transient state.
Abstract translation: 信号发生器电路被配置为产生用于存储器阵列的程序信号。 程序信号被施加到存储器阵列中的字线，并且基于字线和选择器门的耦合特性具有瞬态状态。 瞬态状态被配置为最小化字线和选择器的栅极之间的耦合，使得每个选择器的状态在过渡状态期间保持不变。
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10.发明申请SYSTEM AND METHOD FOR PRESERVING AN ERROR MARGIN FOR A NON-VOLATILE MEMORY 审中-公开用于保存非易失性存储器的错误标志的系统和方法
公开(公告)号：WO2006026309A2
公开(公告)日：2006-03-09
申请号：PCT/US2005/030143
申请日：2005-08-23
Applicant: ATMEL CORPORATION , FRULIO, Massimiliano , TASSAN CASER, Fabio , BEDARIDA, Lorenzo , MARSELLA, Mirella
Inventor： FRULIO, Massimiliano , TASSAN CASER, Fabio , BEDARIDA, Lorenzo , MARSELLA, Mirella
IPC: G11C5/14
Abstract: A system and method for preserving an error margin for a nonvolatile memory that includes a memory cell, a reference cell coupled to a reference current mirror configured to mirror current through the reference cell. The system comprises a memory current mirror coupled to the memory cell and configured to mirror current through the memory cell. A sense amplifier has a first and a second input. The first input is coupled to the reference current mirror and the second input is coupled to the memory current mirror. The sense amplifier is configured to compare a voltage across the memory cell with a voltage across the reference cell.
Abstract translation: 一种用于保持包括存储器单元的非易失性存储器的误差容限的系统和方法，耦合到参考电流镜的参考单元，所述参考电池被配置为镜像通过参考单元的电流。 该系统包括耦合到存储器单元并被配置为镜像通过存储器单元的电流的存储器电流镜。 读出放大器具有第一和第二输入。 第一输入耦合到参考电流镜，第二输入耦合到存储器电流镜。 读出放大器被配置为将存储器单元两端的电压与参考单元两端的电压进行比较。
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