SUPPRESSION OF ELECTRODE RE-CRYSTALLISATION IN A FERROCAPACITOR
    1.
    发明申请
    SUPPRESSION OF ELECTRODE RE-CRYSTALLISATION IN A FERROCAPACITOR 审中-公开
    抑制FERROCAPACITOR中的电极重结晶

    公开(公告)号:WO2004090949A1

    公开(公告)日:2004-10-21

    申请号:PCT/SG2004/000086

    申请日:2004-04-08

    CPC classification number: H01L28/55 H01L28/60

    Abstract: An electrode (1) of a ferrocapacitor formed by an etching process is treated by oxygen implantation to reduce the size of crystal domains (15) in side regions (11) of the electrode (1). Subsequently a cover layer (3) is deposited over the side wall of the electrode to protect the ferrocapacitor in subsequent process steps. Later in the fabrication process the ferrocapacitor is subject to heat treatments, but due to the reduced size of the crystal domains (15) the growth of the crystal domains in the side regions (11) of the electrode is more homogenous, and causes reduced stresses in the cover layer (3), leading to a reduced risk of the cover layer (3) failing to protect the ferrocapacitor.

    Abstract translation: 通过氧注入处理通过蚀刻工艺形成的二茂铁电极的电极(1),以减小电极(1)的侧面区域(11)中的晶体畴(15)的尺寸。 随后,在电极的侧壁上沉积覆盖层(3),以在随后的工艺步骤中保护铁电体电容器。 在制造过程中,铁电体经受热处理,但是由于晶体畴的尺寸减小(15),电极的侧面区域(11)中的晶体畴的生长更均匀,导致应力降低 在覆盖层(3)中,导致覆盖层(3)不能保护铁电体的风险降低。

    METHOD FOR FORMING FERROCAPACITORS AND FERAM DEVICES
    2.
    发明申请
    METHOD FOR FORMING FERROCAPACITORS AND FERAM DEVICES 审中-公开
    形成防腐剂和粉末装置的方法

    公开(公告)号:WO2005031817A1

    公开(公告)日:2005-04-07

    申请号:PCT/SG2004/000269

    申请日:2004-08-31

    CPC classification number: H01L27/11502 H01L27/11507 H01L28/55

    Abstract: A vertical capacitor of an FeRAM device is formed by depositing conductive material and etching it to form electrodes, which are located over openings in an insulating layer so that they are electrically connected to lower levels of the structure. A layer of ferroelectric material is formed on the sides of the electrodes, and etched to a desired, uniform thickness. Conductive material is deposited over the ferroelectric material to form a uniform surface onto which another insulating layer can be deposited. Since this process does not include etching of an insulating layer at a time between the formation of the electrodes and the deposition of the ferroelectric material, no fences of insulating material are formed between them. The geometry can be accurately controlled, to give uniform electric fields and reliable operating parameters.

    Abstract translation: FeRAM器件的垂直电容器通过沉积导电材料并蚀刻形成电极,该电极位于绝缘层中的开口上方,使得它们电连接到结构的较低层。 在电极的侧面形成铁电材料层,并且蚀刻到期望的均匀厚度。 导电材料沉积在铁电材料上以形成可沉积另一绝缘层的均匀表面。 由于该方法不包括在形成电极之间的时间刻蚀绝缘层和铁电体的沉积,所以在它们之间不形成绝缘材料栅栏。 几何形状可以精确控制,给出均匀的电场和可靠的工作参数。

    PROCESS FOR FABRICATION OF A FERROELECTRIC CAPACITOR
    3.
    发明申请
    PROCESS FOR FABRICATION OF A FERROELECTRIC CAPACITOR 审中-公开
    一种用于制造电容器的方法

    公开(公告)号:WO2005022611A1

    公开(公告)日:2005-03-10

    申请号:PCT/SG2004/000209

    申请日:2004-07-13

    CPC classification number: H01L28/56 H01L21/31616 H01L21/31683

    Abstract: A process for the fabrication of a ferroelectric capacitor comprising depositing a layer of Ti (5) over an insulating layer (3) of AI 2 0 3 , and oxidising the Ti layer to form a Ti0 2 layer (7). Subsequently, a layer of PZT (9) is formed over the Ti0 2 layer (7). The PZT layer (9) is subjected to an annealing step in which, due to the presence of the Ti0 2 layer (7) it crystallises to form a layer (11) with a high degree of (111)-texture.

    Abstract translation: 一种用于制造铁电电容器的方法,包括在Al 2 O 3的绝缘层(3)上沉积Ti(5)层,并氧化Ti层以形成TiO 2层(7)。 随后,在TiO 2层(7)上形成一层PZT(9)。 对PZT层(9)进行退火步骤,其中由于TiO 2层(7)的存在,其结晶以形成具有高度(111) - 纹理的层(11)。

    SELF-ALIGNED V0-CONTACT FOR CELL SIZE REDUCTION OF FERAM DEVICES
    4.
    发明申请
    SELF-ALIGNED V0-CONTACT FOR CELL SIZE REDUCTION OF FERAM DEVICES 审中-公开
    自对准的V0接触用于细胞尺寸减少FERAM器件

    公开(公告)号:WO2005031858A1

    公开(公告)日:2005-04-07

    申请号:PCT/SG2004/000273

    申请日:2004-08-31

    CPC classification number: H01L21/76897 H01L28/55

    Abstract: An FeRAM (400) comprising includes a ferroelectric material (211) sandwiched between a top electrode (207) and a bottom electrode (209). A V0-contact (405) provides an electrical connection with an underlying CS-contact (223). The V0-contact is aligned using the bottom electrode. A liner layer (403) covers a sidewall of the bottom electrode and provides a stop to an etch a hole forming the V0-contact. A method is utilized to form a V0-contact in an FeRAM. An Fe capacitor of the FeRAM is encapsulated, a bottom electrode is etched, a liner layer is deposited covering a sidewall of the bottom electrode, and a hole is etched for the V0-contact until the etching is stopped by the liner layer.

    Abstract translation: 包括夹在顶电极(207)和底电极(209)之间的铁电材料(211)的FeRAM(400)。 V0触点(405)提供与底层CS触点(223)的电连接。 使用底部电极对齐V0触点。 衬垫层(403)覆盖底部电极的侧壁,并且提供对形成V0接触的孔的蚀刻的停止。 一种利用FeRAM形成V0接触的方法。 FeRAM的Fe电容器被封装,蚀刻底部电极,沉积覆盖底部电极的侧壁的衬层,并且蚀刻用于V0接触的孔,直到蚀刻被衬垫层停止。

    MULTI-LAYER BARRIER ALLOWING RECOVERY ANNEAL FOR FERROELECTRIC CAPACITORS
    5.
    发明申请
    MULTI-LAYER BARRIER ALLOWING RECOVERY ANNEAL FOR FERROELECTRIC CAPACITORS 审中-公开
    多层障碍物允许用于电容电容器的恢复电极

    公开(公告)号:WO2005008751A1

    公开(公告)日:2005-01-27

    申请号:PCT/SG2004/000192

    申请日:2004-07-02

    CPC classification number: H01G4/1245 H01G4/33 H01L28/57

    Abstract: A multi-layer barrier (115) for a ferroelectric capacitor (101) includes an outdiffusion barrier layer (115a) permeable to both hydrogen and oxygen. The outdiffusion barrier (115a) layer covers the ferroelectric (103) of the capacitor. Oxygen passes through the outdiffusion barrier layer into the ferroelectric during an oxygen anneal in order to repair damage to the ferroelectric caused during etching. The outdiffusion barrier layer reduces the decomposition of the ferroelectric by blocking molecules leaving the ferroelectric during the oxygen anneal. The multi-layer barrier also includes a hydrogen barrier layer (115b) deposited on the outdiffusion barrier layer after repair of the ferroelectric by the oxygen anneal. The hydrogen barrier layer allows the multi-layer barrier to block the passage of hydrogen into the ferroelectric during back-end processes.

    Abstract translation: 用于铁电电容器(101)的多层势垒(115)包括可渗透氢和氧的扩散阻挡层(115a)。 扩散阻挡层(115a)层覆盖电容器的铁电体(103)。 在氧退火期间,氧气通过外扩散阻挡层进入铁电体,以便修复在蚀刻期间引起的铁电体损坏。 扩散阻挡层通过在氧退火期间阻挡离开铁电体的分子来减少铁电体的分解。 多层阻挡层还包括通过氧退火修复铁电体之后沉积在外扩散阻挡层上的氢阻挡层(115b)。 氢阻挡层允许多层屏障在后端工艺期间阻止氢气进入铁电体。

    A DEVICE AND A METHOD FOR FORMING A CAPACITOR DEVICE
    9.
    发明申请
    A DEVICE AND A METHOD FOR FORMING A CAPACITOR DEVICE 审中-公开
    一种用于形成电容器件的装置和方法

    公开(公告)号:WO2005031819A1

    公开(公告)日:2005-04-07

    申请号:PCT/SG2004/000283

    申请日:2004-09-03

    Abstract: A device and method for forming a capacitor device comprises forming a substrate, forming a first interlayer dielectric layer on the substrate and forming two or more contact plugs through the substrate. A conducting layer is formed on the first interlayer dielectric layer and an electrode is formed on alternate ones of the contact plugs by etching the conducting layer. The etched electrodes are then coated with a ferroelectric layer. The ferroelectric layer is etched from the surfaces separating the contact plugs and additional electrodes are created by filling the spaces between the electrodes on alternate ones of the contact plugs with a conductive material to establish electrical contact between the plugs and the electrodes.

    Abstract translation: 用于形成电容器器件的器件和方法包括形成衬底,在衬底上形成第一层间电介质层,并通过衬底形成两个或更多个接触插塞。 在第一层间电介质层上形成导电层,通过蚀刻导电层,在交替的接触插塞上形成电极。 然后用铁电层涂覆蚀刻的电极。 从分离接触塞的表面蚀刻铁电层,并且通过用导电材料填充交替的接触插塞上的电极之间的空间来产生附加电极,以建立插塞和电极之间的电接触。

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