Abstract:
An electrode (1) of a ferrocapacitor formed by an etching process is treated by oxygen implantation to reduce the size of crystal domains (15) in side regions (11) of the electrode (1). Subsequently a cover layer (3) is deposited over the side wall of the electrode to protect the ferrocapacitor in subsequent process steps. Later in the fabrication process the ferrocapacitor is subject to heat treatments, but due to the reduced size of the crystal domains (15) the growth of the crystal domains in the side regions (11) of the electrode is more homogenous, and causes reduced stresses in the cover layer (3), leading to a reduced risk of the cover layer (3) failing to protect the ferrocapacitor.
Abstract:
A vertical capacitor of an FeRAM device is formed by depositing conductive material and etching it to form electrodes, which are located over openings in an insulating layer so that they are electrically connected to lower levels of the structure. A layer of ferroelectric material is formed on the sides of the electrodes, and etched to a desired, uniform thickness. Conductive material is deposited over the ferroelectric material to form a uniform surface onto which another insulating layer can be deposited. Since this process does not include etching of an insulating layer at a time between the formation of the electrodes and the deposition of the ferroelectric material, no fences of insulating material are formed between them. The geometry can be accurately controlled, to give uniform electric fields and reliable operating parameters.
Abstract:
A process for the fabrication of a ferroelectric capacitor comprising depositing a layer of Ti (5) over an insulating layer (3) of AI 2 0 3 , and oxidising the Ti layer to form a Ti0 2 layer (7). Subsequently, a layer of PZT (9) is formed over the Ti0 2 layer (7). The PZT layer (9) is subjected to an annealing step in which, due to the presence of the Ti0 2 layer (7) it crystallises to form a layer (11) with a high degree of (111)-texture.
Abstract:
An FeRAM (400) comprising includes a ferroelectric material (211) sandwiched between a top electrode (207) and a bottom electrode (209). A V0-contact (405) provides an electrical connection with an underlying CS-contact (223). The V0-contact is aligned using the bottom electrode. A liner layer (403) covers a sidewall of the bottom electrode and provides a stop to an etch a hole forming the V0-contact. A method is utilized to form a V0-contact in an FeRAM. An Fe capacitor of the FeRAM is encapsulated, a bottom electrode is etched, a liner layer is deposited covering a sidewall of the bottom electrode, and a hole is etched for the V0-contact until the etching is stopped by the liner layer.
Abstract:
A multi-layer barrier (115) for a ferroelectric capacitor (101) includes an outdiffusion barrier layer (115a) permeable to both hydrogen and oxygen. The outdiffusion barrier (115a) layer covers the ferroelectric (103) of the capacitor. Oxygen passes through the outdiffusion barrier layer into the ferroelectric during an oxygen anneal in order to repair damage to the ferroelectric caused during etching. The outdiffusion barrier layer reduces the decomposition of the ferroelectric by blocking molecules leaving the ferroelectric during the oxygen anneal. The multi-layer barrier also includes a hydrogen barrier layer (115b) deposited on the outdiffusion barrier layer after repair of the ferroelectric by the oxygen anneal. The hydrogen barrier layer allows the multi-layer barrier to block the passage of hydrogen into the ferroelectric during back-end processes.
Abstract:
A fabrication process for ferroelectric capacitors includes forming openings (23, 30), in the device, into which electrically conductive material (28, 37) can be inserted to form electrical connections within the device. The surface of each opening is coated with a layer (24, 34) of getter material which absorbs contaminants (25, 31, 33) formed during the opening process. This means that in subsequent processing steps the contaminants do not vagabond towards the ferroelectric layers (7) of the device where they might otherwise cause damage, for example during a subsequent crystallisation stage.
Abstract:
The present invention provides a sidewall oxygen diffusion barrier and method for fabricating the sidewall oxygen diffusion barrier to reduce the diffusion of oxygen to contact plugs during CW hole reactive ion etch processing of a ferroelectric capacitor of an FeRAM device. In one embodiment the sidewall barrier is formed from a substrate fence, while in another embodiment the sidewall barrier is formed by etching back an oxygen barrier.
Abstract:
Reduced radiation damage to an IC feature such as a ferroelectric capacitor is disclosed. At least a portion of the feature which is sensitive to radiation is covered by a radiation protection layer. The radiation protection layer protects the feature from being damaged to radiation during, for example, processing of the IC. In one embodiment, the radiation protection layer comprises a noble metal, oxides, alloys, or compounds thereof.
Abstract:
A device and method for forming a capacitor device comprises forming a substrate, forming a first interlayer dielectric layer on the substrate and forming two or more contact plugs through the substrate. A conducting layer is formed on the first interlayer dielectric layer and an electrode is formed on alternate ones of the contact plugs by etching the conducting layer. The etched electrodes are then coated with a ferroelectric layer. The ferroelectric layer is etched from the surfaces separating the contact plugs and additional electrodes are created by filling the spaces between the electrodes on alternate ones of the contact plugs with a conductive material to establish electrical contact between the plugs and the electrodes.
Abstract:
The present invention provides a sidewall oxygen diffusion barrier and method for fabricating the sidewall oxygen diffusion barrier to reduce the diffusion of oxygen to contact plugs during CW hole reactive ion etch processing of a ferroelectric capacitor of an FeRAM device. In one embodiment the sidewall barrier is formed from a substrate fence, while in another embodiment the sidewall barrier is formed by etching back an oxygen barrier.