VARIABLE IMPEDANCE CIRCUIT CONTROLLED BY A FERROELECTRIC CAPACITOR
    1.
    发明申请
    VARIABLE IMPEDANCE CIRCUIT CONTROLLED BY A FERROELECTRIC CAPACITOR 审中-公开
    由电磁电容器控制的可变阻抗电路

    公开(公告)号:WO2011155951A1

    公开(公告)日:2011-12-15

    申请号:PCT/US2010/038433

    申请日:2010-06-11

    CPC classification number: G11C11/22 G11C11/221

    Abstract: A memory cell comprising a ferroelectric capacitor, a variable impedance element and a conductive load is disclosed. The ferroelectric capacitor, characterized by first and second polarization states, is connected between a control terminal and a first switch terminal. The variable impedance element has an impedance between the first and second switch terminals that is determined by a signal on a control terminal. The conductive load is connected between a first power terminal and the first switch terminal. The second switch terminal is connected to a second power terminal. When a potential difference is applied between the first and second power terminals, a potential on the first switch terminal varies in a manner determined by the state of polarization of the ferroelectric capacitor.

    Abstract translation: 公开了一种包括铁电电容器,可变阻抗元件和导电负载的存储单元。 特征在于第一和第二极化状态的铁电电容器连接在控制端子和第一开关端子之间。 可变阻抗元件具有由控制端子上的信号确定的第一和第二开关端子之间的阻抗。 导电负载连接在第一电源端子和第一开关端子之间。 第二开关端子连接到第二电源端子。 当在第一和第二电源端子之间施加电位差时,第一开关端子上的电位以由铁电体电容器的极化状态确定的方式变化。

    METHOD FOR CONSTRUCTING FERROELECTRIC CAPACITOR-LIKE STRUCTURES ON SILICON DIOXIDE SURFACES
    3.
    发明申请
    METHOD FOR CONSTRUCTING FERROELECTRIC CAPACITOR-LIKE STRUCTURES ON SILICON DIOXIDE SURFACES 审中-公开
    在二氧化硅表面上构造电解电容器结构的方法

    公开(公告)号:WO1997035339A1

    公开(公告)日:1997-09-25

    申请号:PCT/US1997001880

    申请日:1997-02-06

    CPC classification number: H01L27/11502 H01L28/55 Y10S148/014

    Abstract: A method for fabricating an integrated circuit having at least one integrated circuit component (14) fabricated in a silicon substrate (12) and a second device (30) that is to be fabricated on a silicon oxide layer (16) that covers the integrated circuit component (14). The integrated circuit component (14) has a terminal that is to be connected to a corresponding terminal on the second device (30). The second device (30) includes an electrode structure (35) in contact with a dielectric component that includes a layer (33) of ferroelectric material. In the method of the present invention, a boundary layer comprising non-conducting polysilicon (17) is deposited over the silicon oxide layer (16). The electrode structure (35) is then fabricated by depositing one or more layers over the boundary layer (17). The ferroelectric layer (33) is then deposited over the electrode structure (35) and etched to provide the dielectric component. The boundary layer is then removed utilizing an etchant that etches silicon oxide much slower than polysilicon.

    HIGH-TEMPERATURE ELECTRICAL CONTACT FOR MAKING CONTACT TO CERAMIC MATERIALS AND IMPROVED CIRCUIT ELEMENT USING THE SAME
    4.
    发明申请
    HIGH-TEMPERATURE ELECTRICAL CONTACT FOR MAKING CONTACT TO CERAMIC MATERIALS AND IMPROVED CIRCUIT ELEMENT USING THE SAME 审中-公开
    用于制造与陶瓷材料接触的高温电气接点和改进的电路元件

    公开(公告)号:WO1995008187A1

    公开(公告)日:1995-03-23

    申请号:PCT/US1994008681

    申请日:1994-07-28

    Abstract: A method for connecting a silicon substrate to an electrical component via a platinum conductor. A capacitor (40) can be built over the source (34) of a transistor (32). Cell (30) is constructed by first constructing a CMOS transistor (32) having a drain (33), gate region consisting of gate oxide (35) and gate electrode (36), and source (34). The gate structures are insulated with a glass layer (37). A capacitor (40) is then constructed by depositing a bottom electrode (42) on source (34). A ceramic layer (43) is then deposited and sintered. Finally, the top electrode (41) is deposited. The resulting structure may be heated in the presence of oxygen to a temperature in excess of 800 DEG C without destroying the electrical connection between the silicon substrate and components connected to the platinum conductor. The present invention utilizes a TiN or TiW buffer layer to connect the platinum conductor to the silicon substrate. The buffer layer is deposited as a single crystal on the silicon substrate. The platinum layer is then deposited on the buffer layer. The region of the platinum layer in contact with the buffer layer is also a single crystal.

    Abstract translation: 一种通过铂导体将硅衬底连接到电气部件的方法。 可以在晶体管(32)的源极(34)上构建电容器(40)。 通过首先构造具有漏极(33),由栅极氧化物(35)和栅极电极(36)构成的栅极区域以及源极(34)的CMOS晶体管(32)构成单元(30)。 栅极结构与玻璃层(37)绝缘。 然后通过在源极(34)上沉积底部电极(42)来构造电容器(40)。 然后沉积陶瓷层(43)并烧结。 最后,沉积顶部电极(41)。 所得到的结构可以在氧的存在下加热到超过800℃的温度,而不会破坏硅衬底和连接到铂导体的组件之间的电连接。 本发明利用TiN或TiW缓冲层将铂导体连接到硅衬底。 缓冲层作为单晶沉积在硅衬底上。 然后将铂层沉积在缓冲层上。 与缓冲层接触的铂层的区域也是单晶。

    ANALOG MEMORIES UTILIZING FERROELECTRIC CAPACITORS
    5.
    发明申请
    ANALOG MEMORIES UTILIZING FERROELECTRIC CAPACITORS 审中-公开
    模拟记忆利用铁电电容

    公开(公告)号:WO2012074776A3

    公开(公告)日:2012-12-13

    申请号:PCT/US2011061266

    申请日:2011-11-17

    Abstract: A ferroelectric memory having a plurality of ferroelectric memory cells, each ferroelectric memory cell including a ferroelectric capacitor is disclosed. The ferroelectric memory includes read and write lines and a plurality of ferroelectric memory cell select buses, one select bus corresponding to each of the ferroelectric memory cells. Each of the ferroelectric memory cells includes first and second gates for connecting the ferroelectric memory cell to the read line and the write line, respectively, in response to signals on the ferroelectric memory cell select bus corresponding to that ferroelectric memory cell. A write circuit causes a charge to be stored in the ferroelectric capacitor of the ferroelectric memory cell currently connected to the write line, the charge having a value determined by a data value having at least three states. A read circuit measures the charge stored in the ferroelectric capacitor of the ferroelectric memory cell currently connected to the read line to generate an output value, the output value corresponding to one of the states.

    Abstract translation: 公开了一种具有多个铁电存储器单元的铁电存储器,每个铁电存储器单元包括一个铁电电容器。 铁电存储器包括读和写线以及多个铁电存储单元选择总线,一个选择总线对应于每个铁电存储单元。 每个铁电存储单元包括第一和第二栅极,用于响应与该铁电存储单元对应的铁电存储单元选择总线上的信号,分别将铁电存储单元连接到读出线和写入线。 写入电路使得电荷存储在当前连接到写入线的铁电存储器单元的铁电电容器中,该电荷具有由具有至少三个状态的数据值确定的值。 读电路测量存储在当前连接到读线的铁电存储单元的铁电电容器中的电荷,以产生输出值,输出值对应于其中一个状态。

    METHOD OF DETERMINING POSITION FOR MOBILE COMMUNICATION DEVICE ACCORDING TO POSITON MODE
    6.
    发明申请
    METHOD OF DETERMINING POSITION FOR MOBILE COMMUNICATION DEVICE ACCORDING TO POSITON MODE 审中-公开
    根据POSITON模式确定移动通信设备的位置的方法

    公开(公告)号:WO2007026995A1

    公开(公告)日:2007-03-08

    申请号:PCT/KR2006/002321

    申请日:2006-06-16

    CPC classification number: H04W64/00 G01S5/02 G01S5/0226 G01S5/0273 H04B7/2606

    Abstract: A method of determining a location of a mobile communication terminal, including: receiving base station signal information from the mobile communication terminal, the base station signal information being transmitted from a plurality of base stations including a reference base station to the mobile communication terminal; selecting neighboring base stations, which are located within a predetermined distance from the reference base station, from base stations corresponding to the base station signal information by searching a network database; determining whether the base station signal information corresponding to the neighboring base stations and the reference base station is received via a repeater; determining a vector proceeding order with respect to the reference base station and the neighboring base stations; setting a vector proceeding point, depending upon the determination on whether the base station signal information corresponding to the neighboring base stations and the reference base station is received via the repeater; setting a location mode of the mobile communication terminal according to a domination degree of the reference base station with respect to the mobile communication terminal; determining the location of the mobile communication terminal by determining a vector-based location with respect to the vector proceeding point according to the vector proceeding order, using a PN strength of the base station signal information according to the location mode.

    Abstract translation: 一种确定移动通信终端的位置的方法,包括:从移动通信终端接收基站信号信息,从包括参考基站的多个基站向移动通信终端发送的基站信号信息; 通过搜索网络数据库,选择位于距参考基站预定距离内的相邻基站与对应于基站信号信息的基站; 确定经由中继器是否接收到与所述相邻基站和所述参考基站相对应的基站信号信息; 确定相对于参考基站和相邻基站的向量进程顺序; 根据是否经由中继器接收到对应于相邻基站和参考基站的基站信号的确定来设置向量进位点; 根据参考基站相对于移动通信终端的统治度,设置移动通信终端的位置模式; 通过使用根据所述位置模式的所述基站信号信息的PN强度,根据所述向量进行顺序确定相对于所述向量进位点的基于向量的位置来确定所述移动通信终端的位置。

    FERROELECTRIC BASED MEMORY DEVICES UTILIZING HYDROGEN BARRIERS AND GETTERS

    公开(公告)号:WO2000058806A3

    公开(公告)日:2000-10-05

    申请号:PCT/US2000/008186

    申请日:2000-03-27

    Abstract: A ferroelectric memory cell (200) for storing information. The information is stored in the remnant polarization of a ferroelectric dielectric layer (213) by setting the direction of the remnant polarization. The ferroelectric memory cell is designed to store the information at a temperature less than a first temperature. The memory cell includes top and bottom contacts that sandwich the dielectric layer (213) which includes a ferroelectric material having a Curie point greater than the first temperature and less than 400 °C. The dielectric layer (213) is encapsulated in an oxygen impermeable material such that the encapsulating layer (221) prevents oxygen from entering or leaving the dielectric layer (213). The memory also includes a hydrogen barrier layer (225) that inhibits the flow of oxygen to the top and bottom electrodes when the memory cell is placed in a gaseous environment containing hydrogen. In one embodiment of the invention, a hydrogen absorbing layer is included. In the preferred embodiment of the present invention, the hydrogen barrier layer (225) is constructed from a material that will also bind hydrogen ions.

    HIGH DENSITY MEMORY AND DOUBLE WORD FERROELECTRIC MEMORY CELL FOR CONSTRUCTING THE SAME
    8.
    发明申请
    HIGH DENSITY MEMORY AND DOUBLE WORD FERROELECTRIC MEMORY CELL FOR CONSTRUCTING THE SAME 审中-公开
    高密度存储器和双重写字电容存储器单元

    公开(公告)号:WO1997027631A1

    公开(公告)日:1997-07-31

    申请号:PCT/US1997000863

    申请日:1997-01-21

    CPC classification number: H01L27/11502 G11C11/22 G11C11/5657

    Abstract: A high density non volatile ferroelectric-based memory (500) based on ferroelectric FET operated in a two terminal write mode. Storage words may be constructed either from one or two bit storage cells based on a ferroelectric FET (10). A memory using either the one or two bit storage cells includes a plurality of word storage cells (502) organized into a rectangular array including a plurality of columns and rows. Each of the single bit memory cells (101) includes a pass transistor (115) and a ferroelectric storage element (116). All of the gates of the ferroelectric storage elements transistors are connected to a common gate electrode (122), and all of the source electrodes are connected to a common source electrode (121). If the memory is built as a two bit storage cell (300), all of the common source electrodes in each of the columns are connected electrically to a column electrode (504) corresponding to that column and all of the pass gates in each of the rows that are connected electrically to a row electrode (503) corresponding to that row.

    Abstract translation: 基于以两端写入模式操作的铁电FET的高密度非挥发性铁电存储器(500)。 存储字可以由基于铁电FET(10)的一个或两个位存储单元构成。 使用一个或两个位存储单元的存储器包括组织成包括多个列和行的矩形阵列的多个字存储单元(502)。 单个位存储单元(101)中的每一个包括通过晶体管(115)和铁电存储元件(116)。 铁电存储元件晶体管的所有栅极连接到公共栅电极(122),并且所有源电极连接到公共源电极(121)。 如果存储器被构建为两位存储单元(300),则每个列中的所有公共源电极电连接到对应于该列的列电极(504),并且在每个列中的所有通孔 与行对应的行电极(503)电连接的行。

    IMPROVED NON-DESTRUCTIVELY READ FERROELECTRIC MEMORY CELL
    9.
    发明申请
    IMPROVED NON-DESTRUCTIVELY READ FERROELECTRIC MEMORY CELL 审中-公开
    改进的非破坏性阅读电磁记忆体

    公开(公告)号:WO1996029742A1

    公开(公告)日:1996-09-26

    申请号:PCT/US1996003128

    申请日:1996-03-09

    CPC classification number: H01L29/516 G11C11/223

    Abstract: An improved ferroelectric FET structure (10) in which the ferroelectric layer (14) is doped to reduce retention loss. A ferroelectric FET according to the present invention includes a semiconductor layer (16) having first and second contacts (18, 19) thereon, the first and second contacts being separated from one another. The ferroelectric FET also includes a bottom electrode (12) and a ferroelectric layer (14) which is sandwiched between the semiconductor layer (16) and the bottom electrode (12). The ferroelectric layer (14) is constructed from a perovskite structure of the chemical composition ABO3 wherein the B site comprises first and second elements and a dopant element that has an oxidation state greater than +4 in sufficient concentration to impede shifts in the resistance measured between the first and second contacts with time. The ferroelectric FET structure preferably comprises Pb in the A-site. The first and second elements are preferably Zr and Ti, respectively. The preferred B-site dopants are Niobium, Tantalum, and Tungsten at concentration between 1 % and 8 %.

    Abstract translation: 改进的铁电FET结构(10),其中掺杂铁电层(14)以减少保留损耗。 根据本发明的铁电FET包括其上具有第一和第二触点(18,19)的半导体层(16),第一和第二触点彼此分离。 铁电FET还包括夹在半导体层(16)和底部电极(12)之间的底部电极(12)和铁电体层(14)。 铁电层(14)由化学组成ABO 3的钙钛矿结构构成,其中B位置包含第一和第二元素以及具有大于+4的氧化态足够浓度的掺杂剂元素,以阻止在 第一次和第二次接触时间。 铁电FET结构优选在A位置包含Pb。 第一和第二元素分别优选为Zr和Ti。 优选的B位掺杂剂是浓度在1%和8%之间的铌,钽和钨。

    THERMAL REFLECTIVE PACKAGING SYSTEM
    10.
    发明申请
    THERMAL REFLECTIVE PACKAGING SYSTEM 审中-公开
    热反射包装系统

    公开(公告)号:WO1994027871A1

    公开(公告)日:1994-12-08

    申请号:PCT/US1994005847

    申请日:1994-05-26

    Abstract: A shipping container system comprises an inner liner (1) for insertion into an inner shipping container (15), for insertion into an outer shipping container (16). The inner liner (1) comprises a layer of single- or double-bubble radiant barrier material (13) within a sealed vinyl pouch (21). Between the outer container (6) and the inner container (5) there is furnished at least one spacer tray (3), for providing a partially-surrounding pocket of air in contact with the exterior surface of the inner container (5). During sealing of the pouch (21), a pocket of air is allowed to remain in its interior so that the radiant barrier material (13) floats within the sealed pouch (21). The pockets of air provided allow for maximization of the thermal insulating properties of the system due primarily to the thermal reflective property of the radiant barrier material. The vinyl construction of the pouch material provides a durable protective cover for the radiant barrier material.

    Abstract translation: 运输容器系统包括用于插入内部运输容器(15)中的内衬(1),用于插入到外运输容器(16)中。 内衬垫(1)包括在密封的乙烯基袋(21)内的单层或双气泡辐射阻挡材料层(13)。 在外部容器(6)和内部容器(5)之间设置有至少一个间隔托盘(3),用于提供与内部容器(5)的外表面接触的部分环绕的空气袋。 在密封袋(21)期间,允许空气袋保持在其内部,使得辐射阻挡材料(13)浮在密封袋(21)内。 提供的空气袋允许主要由于辐射屏障材料的热反射性能而使系统的绝热性能最大化。 袋材料的乙烯基结构为辐射屏障材料提供耐用的保护罩。

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